Frequency domain resource allocation for compact downlink control information in mobile communications
Various solutions for frequency domain-resource allocation (FD-RA) for compact downlink control information (DCI) design and operations with respect to user equipment and network apparatus in mobile communications are described. An apparatus may determine at least one of a first step size corresponding to a start of a FD-RA, a second step size corresponding to a length of the FD-RA, and a number of FD-RA bits. The apparatus may determine resources blocks (RBs) according to at least one of the first step size, the second step size, and the number of FD-RA bits. The apparatus may perform a downlink or uplink transmission according to the RBs.
1. A method, comprising:
determining, by a processor of an apparatus, at least one of a first step size corresponding to a start of a frequency domain-resource allocation (FD-RA), a second step size corresponding to a length of the FD-RA, and a number of FD-RA bits;
determining, by the processor, resources blocks (RBs) according to at least one of the first step size, the second step size, and the number of FD-RA bits; and
performing, by the processor, a downlink or uplink transmission according to the RBs,
wherein, in an event that the first step size and the second step size are configured by a radio resource control (RRC) configuration as a fixed step size, the determining of at least one of the first step size, the second step size, and the number of the FD-RA bits comprises determining the number of the FD-RA bits in the resource allocation field of the compact DCI based on a number of available RBs and the fixed step size, and
wherein the first step size and the second step size are equal and configured with a single RRC parameter.
2. The method of claim 1 , further comprising:
determining, by the processor, at least one of the first step size and the second step size according to a fixed number of FD-RA bits.
3. The method of claim 1 , further comprising:
determining, by the processor, at least one of the first step size and the second step size according to a number of RBs.
4. The method of claim 1 , further comprising:
determining, by the processor, at least one of the first step size and the second step size according to a lookup table.
5. The method of claim 1 , further comprising:
determining, by the processor, a beta value according to the number of FD-RA bits; and
determining, by the processor, at least one of the first step size and the second step size according to the beta value.
6. The method of claim 1 , further comprising:
determining, by the processor, at least one of the first step size and the second step size by minimizing a sum of the first step size and the second step size.
7. The method of claim 1 , further comprising:
determining, by the processor, at least one of the first step size and the second step size according to a predetermined rule.
8. An apparatus, comprising:
a transceiver capable of wirelessly communicating with a peer apparatus of a wireless network; and
a processor communicatively coupled to the transceiver, the processor capable of:
determining at least one of a first step size corresponding to a start of a frequency domain-resource allocation (FD-RA), a second step size corresponding to a length of the FD-RA, and a number of FD-RA bits in a resourde allocation field of a compact downlink control information (DCI);
determining resources blocks (RBs) according to at least one of the first step size, the second step size, and the number of FD-RA bits; and
performing a downlink or uplink transmission with the peer apparatus according to the RBs;
wherein, in an event that the first step size and the second step size are configured by a radio resource control (RRC) configuration as a fixed step size, in determining at least one of the first step size, the second step size, and the number of the FD-RA bits, the processor is configured to determine the number of the FD-RA bits in the resource allocation field of the compact DCI based on a number of available RBs and the fixed step size,
wherein the first step size and the second step size are equal and configured with a single RRC parameter.
9. The apparatus of claim 8 , wherein the processor is further capable of:
determining at least one of the first step size and the second step size according to a fixed number of FD-RA bits.
10. The apparatus of claim 8 , wherein the processor is further capable of:
determining at least one of the first step size and the second step size according to a number of RBs.
11. The apparatus of claim 8 , wherein the processor is further capable of:
determining at least one of the first step size and the second step size according to a lookup table.
12. The apparatus of claim 8 , wherein the processor is further capable of:
determining a beta value according to the number of FD-RA bits; and
determining at least one of the first step size and the second step size according to the beta value.
13. The apparatus of claim 8 , wherein the processor is further capable of:
determining at least one of the first step size and the second step size by minimizing a sum of the first step size and the second step size.
14. The apparatus of claim 8 , wherein the processor is further capable of:
determining at least one of the first step size and the second step size according to a predetermined rule.