IP Library Granted Patent US 10,843,915
Granted Patent B2
US 10,843,915 · App. 16/382,750 · Granted Nov 24, 2020

Forming an offset in an interdigitated capacitor of a microelectromechanical systems (MEMS) device

Inventors: Sebastian Pregl (Dresden, DE); Uwe Rudolph (Dresden, DE)
Assignee: Infineon Dresdon GmbH & Co. KG
B81B3/0051B81B3/0086B81C1/00166B81C1/00182B81B2201/0221B81B2201/0257B81B2201/042B81B2203/0136B81B2203/0181B81B2203/0315B81B2203/04B81B2203/058B81C2201/013B81C2203/0136
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Quick Facts
Patent No.
US 10,843,915
App. No.
16/382,750
Granted
Nov 24, 2020
Kind
B2
Abstract

A method for forming a MEMS device may include performing a silicon-on-nothing process to form a cavity in a monocrystalline silicon substrate at a first depth relative to a top surface of the monocrystalline silicon substrate; forming, in an electrically conductive electrode region of the monocrystalline silicon substrate, an electrically insulated region extending to a second depth that is less than the first depth relative to the top surface of the monocrystalline silicon substrate; and etching the monocrystalline silicon substrate to expose a gap between a first electrode and a second electrode, wherein the second electrode is separated from the first electrode, within a first depth region, by a first distance defined by the electrically insulated region and the gap, and wherein the second electrode is separated from the first electrode, within a second depth region, by a second distance defined by the gap.

Claims (50)

1. A microelectromechanical systems (MEMS) device, comprising:

a non-silicon-on-insulator (SOI) monocrystalline semiconductor substrate comprising a MEMS structure that includes:

a first electrode and a second electrode arranged to be movable relative to each other and separated by a gap, and

an electrically insulated region formed between the first electrode and the second electrode and comprising a solid material,

wherein the first electrode and the second electrode are part of an interdigitated electrode structure and are, within a first depth region, separated from each other by a first lateral distance and, within a second depth region, separated from each other by a second lateral distance,

wherein the first lateral distance includes a first length associated with the gap and a second length associated with the electrically insulated region,

wherein the second lateral distance includes the first length and not the second length, and

wherein an edge of the second electrode is aligned with a first edge of the electrically insulated region,

the first edge of the electrically insulated region being closer to the first electrode than a second edge of the electrically insulated region.

2. The MEMS device of claim 1 , wherein the first depth region is located closer to a top surface of the non-SOI monocrystalline semiconductor substrate than the second depth region.

3. The MEMS device of claim 1 , wherein the gap extends from a top surface of the non-SOI monocrystalline semiconductor substrate to a cavity formed in the non-SOI monocrystalline semiconductor substrate.

4. The MEMS device of claim 3 , wherein the cavity is located farther from the top surface than the first depth region and the second depth region.

5. The MEMS device of claim 3 , wherein an edge of the cavity is aligned with the first edge of the electrically insulated region.

6. The MEMS device of claim 1 , wherein the first edge of the electrically insulated region is parallel to the second edge of the electrically insulated region.

7. The MEMS device of claim 1 , wherein the MEMS structure further includes:

a third electrode and a fourth electrode arranged to be movable relative to each other and separated by another gap.

8. A method of forming a microelectromechanical systems (MEMS) device, comprising:

forming, in an electrically conductive electrode region of a non-silicon-on-insulator (SOI) monocrystalline semiconductor substrate, an electrically insulated region extending to a first depth relative to a top surface of the non-SOI monocrystalline semiconductor substrate,

the electrically insulated region comprising a solid material; and

etching the electrically conductive electrode region to expose a gap between a first electrode and a second electrode,

the first electrode and the second electrode being movable relative to each other,

the first electrode and the second electrode being part of an interdigitated electrode structure and being, within a first depth region, separated from each other by a first lateral distance and, within a second depth region, separated from each other by a second lateral distance,

the first lateral distance including a first length associated with the gap and a second length associated with the electrically insulated region,

the second lateral distance including the first length and not the second length, and

an edge of the second electrode being aligned with a first edge of the electrically insulated region,

the first edge of the electrically insulated region being closer to the first electrode than a second edge of the electrically insulated region.

9. The method of claim 8 , wherein the first depth region is located closer to the top surface of the non-SOI monocrystalline semiconductor substrate than the second depth region.

10. The method of claim 8 , further comprising:

performing a silicon-on-nothing process to form a cavity in the non-SOI monocrystalline semiconductor substrate at a second depth relative to the top surface of the non-SOI monocrystalline semiconductor substrate.

11. The method of claim 10 , wherein the cavity is located farther from the top surface than the first depth region and the second depth region.

12. The method of claim 10 , wherein an edge of the cavity is approximately aligned with the first edge of the electrically insulated region.

13. The method of claim 8 , further comprising:

forming, in another electrically conductive electrode region of the non-SOI monocrystalline semiconductor substrate, another electrically insulated region extending to the first depth relative to the top surface of the non-SOI monocrystalline semiconductor substrate;

and etching the other electrically conductive electrode region to expose another gap between a third electrode and a fourth electrode.

14. The method of claim 13 , wherein an edge of the fourth electrode is aligned with an edge of the other electrically insulated region.

15. A microelectromechanical systems (MEMS) device, comprising:

a substrate including an electrically conductive electrode region,

the electrically conductive electrode region comprising:

a first electrode,

a second electrode,

a gap, and

an electrically insulated region comprising a solid material,

the first electrode, within a first depth region, being separated from the second electrode by the electrically insulated region and the gap,

the gap, within the first depth region, separating the electrically insulated region and the first electrode, and

the first electrode, within a second depth region, being separated from the second electrode by the gap.

16. The MEMS device of claim 15 , wherein the first depth region is located closer to a top surface of the substrate than the second depth region.

17. The MEMS device of claim 15 , wherein the gap extends from a top surface of the substrate to a cavity formed in the substrate.

18. The MEMS device of claim 17 , wherein the cavity is located farther from the top surface than the first depth region and the second depth region.

19. The MEMS device of claim 17 , wherein an edge of the cavity is aligned with an edge of the electrically insulated region.

20. The MEMS device of claim 17 , wherein an edge of the cavity is aligned with an edge of a portion of the second electrode.

Assignments (3)
CHANGE OF NAME Recorded Jun 12, 2024
From: INFINEON TECHNOLOGIES DRESDEN GMBH
To: INFINEON TECHNOLOGIES DRESDEN GMBH & CO. KG
Reel/Frame 067699/0648 →
CHANGE OF NAME Recorded Apr 29, 2019
From: INFINEON TECHNOLOGIES DRESDEN GMBH
To: INFINEON TECHNOLOGIES DRESDEN GMBH & CO. KG
Reel/Frame 049019/0155 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 12, 2019
From: PREGL, SEBASTIAN; RUDOLPH, UWE
To: INFINEON TECHNOLOGIES DRESDEN GMBH
Reel/Frame 048872/0282 →
Continuity (2)
Division 15664834 · Jul 31, 2017
Related Publication 20190233276A1 · Aug 1, 2019