IP Library › Granted Patent US 11,195,796
Granted Patent B2
US 11,195,796 · App. 16/384,655 · Granted Dec 7, 2021

Semiconductor device structure and method for forming the same

Inventors: Chuan-Shian Fu (Hsinchu, TW); Shao-Hwang Sher (Hsinchu, TW)
Assignee: MediaTek Inc.
H01L23/5286H01L21/02532H01L21/02603H01L21/30604H01L29/0673H01L29/42392H01L29/66545H01L29/66742H01L29/78618H01L29/78696
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Quick Facts
Patent No.
US 11,195,796
App. No.
16/384,655
Granted
Dec 7, 2021
Kind
B2
Abstract

A semiconductor device structure includes a gate structure, first epitaxial structures, a power rail, and a second epitaxial structure. The gate structure is disposed on a substrate extending in a first direction. The first epitaxial structures are surrounded by a contact structure disposed on opposite sides of the gate structure extending in the first direction. The power rail is spaced apart from the gate structure and the first epitaxial structures. The power rail extends in the second direction, which is perpendicular to the first direction. The second epitaxial structure is surrounded by the contact structure disposed directly beneath the power rail. The second epitaxial structure is electrically connected to the power rail.

Claims (25)

1. A semiconductor device structure, comprising:

a gate structure disposed on a substrate extending in a first direction;

first epitaxial structures surrounded by a contact structure disposed on opposite sides of the gate structure, the first epitaxial structures extending in the first direction;

a power rail spaced apart from the gate structure and the first epitaxial structures, wherein the power rail extends in a second direction, which is perpendicular to the first direction; and

a second epitaxial structure, wherein the contact structure is on a top, a bottom and sides of the second epitaxial structure, the second epitaxial structure being disposed directly beneath the power rail,

wherein the second epitaxial structure is electrically connected to the power rail.

2. The semiconductor device structure as claimed in claim 1 , wherein the first epitaxial structures or the second epitaxial structure comprise a plurality of vertically arranged epitaxial layers.

3. The semiconductor device structure as claimed in claim 2 , wherein the first epitaxial structures and the second epitaxial structure comprise a different number of epitaxial layers.

4. The semiconductor device structure as claimed in claim 2 , wherein the first epitaxial structures and the second epitaxial structure comprise same number of epitaxial layers.

5. The semiconductor device structure as claimed in claim 1 , wherein the first epitaxial structures or the second epitaxial structure comprise a single epitaxial block.

6. The semiconductor device structure as claimed in claim 1 , wherein the gate structure comprises a plurality of vertically arranged second semiconductor layers surrounded by a gate stack.

7. The semiconductor device structure as claimed in claim 1 , wherein a space between the first epitaxial structures and the second epitaxial structure is in a range from about 10% to about 70% of a width of the first epitaxial structures.

8. The semiconductor device structure as claimed in claim 1 , wherein a width of the second epitaxial structure is in a range from about 25% to about 100% of a width of the power rail.

9. A semiconductor device structure, comprising:

first gate structures disposed on a substrate;

a first epitaxial structure disposed between the first gate structures; and

a pair of first contact structures disposed on opposite sides of the first epitaxial structure, wherein the pair of first contact structures are spaced apart from each other by the first epitaxial structure, wherein a contact structure of the pair of first contact structures contacts the first epitaxial structure on a top, a side and a bottom of the first epitaxial structure.

10. The semiconductor device structure as claimed in claim 9 , wherein the first epitaxial structure comprises a plurality of vertically arranged epitaxial layers.

11. The semiconductor device structure as claimed in claim 9 , wherein the first epitaxial structure comprises a single epitaxial block.

12. The semiconductor device structure as claimed in claim 9 , wherein a ratio of a width and a height of the first epitaxial structure is in a range from about 100% to about 1000%.

13. The semiconductor device structure as claimed in claim 9 , further comprising:

a second gate structure disposed parallel to the first gate structures;

a second epitaxial structure disposed between the second gate structure and the first gate structures; and

a pair of second contact structures disposed on opposite sides of the second epitaxial structure, wherein the pair of second contact structures surround a portion of the second epitaxial structure, and the pair of second contact structures are spaced apart from each other by the second epitaxial structure.

14. The semiconductor device structure as claimed in claim 13 , wherein the first and second contact structures disposed on an end of the first epitaxial structure and the second epitaxial structure are electrically connected to each other, and the first and second contact structures disposed on another end of first epitaxial structure and the second epitaxial structure are electrically connected to each other.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 15, 2019
From: FU, CHUAN-SHIAN; SHER, SHAO-HWANG
To: MEDIATEK, INC.
Reel/Frame 048888/0793 →
Continuity (3)
Provisional Application 62674078 · May 21, 2018
Provisional Application 62668284 · May 8, 2018
Related Publication 20190348367A1 · Nov 14, 2019