IP Library › Granted Patent US 11,081,153
Granted Patent B2
US 11,081,153 · App. 16/395,571 · Granted Aug 3, 2021

Magnetic memory device with balancing synthetic anti-ferromagnetic layer

Inventors: Gaurav Gupta (Hsinchu, TW); Zhiqiang Wu (Chubei, TW); William J. Gallagher (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
G11C11/161H01L27/228H01L43/08H01L43/10H01L43/12
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,081,153
App. No.
16/395,571
Granted
Aug 3, 2021
Kind
B2
Abstract

In some embodiments, the present application provides a magnetic memory device. The magnetic memory device comprises a bottom electrode, and a first synthetic anti-ferromagnetic (SyAF) layer including a first pinning layer and a second pinning layer disposed over the bottom electrode and having opposite magnetization directions and separated by a first spacer layer. The magnetic memory device further comprises a reference layer disposed over the first pair of pinning layers and a free layer disposed over the reference layer and separated from the reference layer by a tunneling barrier layer. The magnetic memory device further comprises a second synthetic anti-ferromagnetic (SyAF) layer including a third pinning layer and a fourth pinning layer disposed over the free layer and having opposite magnetization directions and separated by a second spacer layer.

Claims (45)

1. A magnetic memory device, comprising:

a bottom electrode;

a first synthetic anti-ferromagnetic (SyAF) layer including a first pinning layer and a second pinning layer disposed over the bottom electrode and having opposite magnetization directions and separated by a first spacer layer, with the second pinning layer being the one closer to the bottom electrode;

a reference layer disposed over the first SyAF layer;

a free layer disposed over the reference layer and separated from the reference layer by a tunneling barrier layer; and

a second synthetic anti-ferromagnetic (SyAF) layer including a third pinning layer and a fourth pinning layer disposed over the free layer and having opposite magnetization directions and separated by a second spacer layer, with the third pinning layer being the one closer to the free layer.

2. The magnetic memory device of claim 1 , wherein the third pinning layer has a magnetization direction aligned and anti-parallel with a magnetization direction of the reference layer.

3. The magnetic memory device of claim 2 , wherein the fourth pinning layer has a magnetization direction aligned and parallel with the magnetization direction of the reference layer.

4. The magnetic memory device of claim 1 , further comprising:

a first transition layer disposed between the reference layer and the first pinning layer; and

a second transition layer disposed between the free layer and the third pinning layer;

wherein the first transition layer and the second transition layer respectively comprises non-magnetic metals.

5. The magnetic memory device of claim 4 , wherein the first transition layer and the second transition layer respectively comprises tantalum (Ta), tungsten (W), molybdenum (Mo), Hafnium (Hf), or CoFeW.

6. The magnetic memory device of claim 1 , wherein the first spacer layer and the second spacer layer respectively comprises ruthenium (Ru) or iridium (Ir).

7. The magnetic memory device of claim 1 , wherein the first synthetic anti-ferromagnetic (SyAF) layer, the second synthetic anti-ferromagnetic (SyAF) layer, and the reference layer are configured to colletively generate a zero net stray field on the free layer.

8. The magnetic memory device of claim 1 , wherein the first synthetic anti-ferromagnetic (SyAF) layer and the second synthetic anti-ferromagnetic (SyAF) layer are configured to generate a net stray field that points in a magnetization direction of the reference layer.

9. A magnetic memory device, comprising:

a free layer;

a reference layer disposed on a first side of the free layer and separated from the free layer by a tunneling barrier layer; and

a balancing synthetic anti-ferromagnetic (SyAF) layer disposed on a second side of the free layer opposite to the first side, the balancing synthetic anti-ferromagnetic (SyAF) layer including a pair of pinning layers having opposite magnetization directions and separated by a spacer layer.

10. The magnetic memory device of claim 9 , wherein the magnetization directions of the pair of pinning layers are aligned with a magnetization direction of the reference layer.

11. The magnetic memory device of claim 9 , further comprising:

a first spacer layer disposed on one side of the reference layer opposite to the free layer; and

a first pinning layer disposed on one side of the first spacer layer opposite to the reference layer.

12. The magnetic memory device of claim 11 , wherein the first pinning layer, the balancing synthetic anti-ferromagnetic (SyAF) layer, and the reference layer are configured to collectively generate a zero net stray field on the free layer.

13. The magnetic memory device of claim 11 , wherein the first pinning layer, the balancing synthetic anti-ferromagnetic (SyAF) layer, and the free layer are configured to collectively generate a positive net stray field on the reference layer.

14. The magnetic memory device of claim 11 , wherein the first pinning layer has a magnetization direction aligned and anti-parallel with a magnetization direction of the reference layer.

15. The magnetic memory device of claim 11 , wherein the spacer layer and the first spacer layer respectively comprises ruthenium (Ru) or iridium (Ir).

16. The magnetic memory device of claim 9 , further comprising

a first synthetic anti-ferromagnetic (SyAF) layer disposed on the first side of the free layer and separated from the free layer by the reference layer;

wherein the first synthetic anti-ferromagnetic (SyAF) layer includes a first pinning layer and a second pinning layer having opposite magnetization directions and separated by a first spacer layer.

17. The magnetic memory device of claim 16 , further comprising a first transition layer disposed between the reference layer and the first pinning layer.

18. The magnetic memory device of claim 17 , further comprising:

a second transition layer disposed between the free layer and the balancing synthetic anti-ferromagnetic (SyAF) layer;

wherein the first transition layer and the second transition layer respectively comprises non-magnetic metals.

19. The magnetic memory device of claim 18 , wherein the first transition layer and the second transition layer respectively comprises tantalum (Ta), tungsten (W), molybdenum (Mo), afnium (Hf), niobium (Nb), or CoFeW.

20. An integrated circuit, comprising:

a semiconductor substrate;

an interconnect structure disposed over the semiconductor substrate, and including a plurality of dielectric layers and a plurality of metal layers stacked over one another, wherein the plurality of metal layers include a lower metal layer and an upper metal layer disposed over the lower metal layer;

a magnetoresistive random access memory (MRAM) cell arranged over the upper metal layer, the MRAM cell comprising:

a bottom electrode disposed over and in electrical contact with the lower metal layer;

a top electrode disposed under and in electrical contact with the upper metal layer;

a free layer and a reference layer disposed between the bottom electrode and the top electrode, stacked, and separated by a tunneling barrier layer;

a first pinning layer on one side of the reference layer opposite to the free layer; and

a balancing synthetic anti-ferromagnetic (SyAF) layer disposed on a second side of the free layer opposite to the reference layer, the balancing synthetic anti-ferromagnetic (SyAF) layer including a pair of pinning layers having opposite magnetization directions and separated by a spacer layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 20, 2019
From: GUPTA, GAURAV; WU, ZHIQIANG; GALLAGHER, WILLIAM J.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 049232/0008 →
Continuity (2)
Provisional Application 62692313 · Jun 29, 2018
Related Publication 20200005845A1 · Jan 2, 2020
Cited By (1)
US 12,543,507