IP Library Granted Patent US 11,251,312
Granted Patent B2
US 11,251,312 · App. 16/395,907 · Granted Feb 15, 2022

Semiconductor device

Inventors: Mongsong Liang (Seongnam-si, KR); Sung-Dae Suk (Seoul, KR); Geumjong Bae (Suwon-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H01L29/78696H01L21/823412H01L21/823418H01L21/823437H01L27/088H01L27/1104H01L27/1116H01L29/0673H01L29/161H01L29/165H01L29/1608H01L29/42392H01L29/66545H01L29/7848H01L29/78618
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Quick Facts
Patent No.
US 11,251,312
App. No.
16/395,907
Granted
Feb 15, 2022
Kind
B2
Abstract

A semiconductor device includes a first transistor, a second transistor and a third transistor provided on a substrate, the first to third transistors respectively including source and drain regions spaced apart from each other, a gate structure extending in a first direction on the substrate and interposed between the source and drain regions, and a channel region connecting the source and drain regions to each other. A channel region of the second transistor and a channel region of the third transistor respectively include a plurality of channel portions, the plurality of channel portions spaced apart from each other in a second direction, perpendicular to an upper surface of the substrate, and connected to the source and drain regions, respectively. A width of a channel portion of the third transistor in the first direction is greater than a width of a channel portion of the second transistor in the first direction.

Claims (23)

1. A semiconductor device comprising:

a first transistor, a second transistor and a third transistor provided on a same substrate, the first to third transistors respectively comprising source and drain regions spaced apart from each other, and a channel region connecting the source and drain regions to each other,

wherein the channel region of the first transistor has a single channel portion, which is connected to the substrate, and has a shape of a fin protruding from an upper surface of the substrate,

wherein a channel region of the second transistor and a channel region of the third transistor respectively comprise a plurality of channel portions, the plurality of channel portions in the second transistor being spaced apart from each other in a direction, perpendicular to the upper surface of the substrate, and connected to the source region and the drain region, and the plurality of channel portions in the third transistor being spaced apart from each other and connected to the source region and the drain region,

wherein the first transistor, the second transistor, and the third transistor comprise a first gate electrode, a second gate electrode and a third gate electrode, respectively, and the second gate electrode extends between the plurality of channel portions of the channel region of the second transistor, and the third gate electrode extends between the plurality of channel portions of the channel region of the third transistor, and

wherein a work function of the third gate electrode is different from a work function of the second gate electrode.

2. The semiconductor device of claim 1 , wherein a threshold voltage of the first transistor is greater than a threshold voltage of the second transistor.

3. The semiconductor device of claim 1 , wherein a width of a channel portion of the third transistor is equal to a width of a channel portion of the second transistor.

4. The semiconductor device of claim 1 , wherein a threshold voltage of the third transistor is less than a threshold voltage of the second transistor.

5. The semiconductor device of claim 1 , wherein the first to third transistors have the same conductivity type.

6. The semiconductor device of claim 1 , wherein a length of a channel portion of the third transistor is equal to a length of a channel portion of the second transistor.

7. The semiconductor device of claim 1 , wherein a number of the plurality of channel portions of the second transistor is equal to a number of the plurality of channel portions of the third transistor.

8. A semiconductor device comprising:

a first transistor, a second transistor and a third transistor provided on a same substrate, the first to third transistors respectively comprising source and drain regions spaced apart from each other, and a channel region connecting the source and drain regions to each other,

wherein the channel region of the first transistor has a single channel portion, which is connected to the substrate, and has a shape of a fin protruding from an upper surface of the substrate,

wherein a channel region of the second transistor and a channel region of the third transistor respectively comprise a plurality of channel portions, the plurality of channel portions in the second transistor being spaced apart from each other in a first direction, perpendicular to the upper surface of the substrate, and connected to the source region and the drain region, and the plurality of channel portions in the third transistor being spaced apart from each other and connected to the source region and the drain region,

wherein the first transistor, the second transistor, and the third transistor comprise a first gate electrode, a second gate electrode and a third gate electrode, respectively, and the second gate electrode extends in a second direction between the plurality of channel portions of the channel region of the second transistor, and the third gate electrode extends in the second direction between the plurality of channel portions of the channel region of the third transistor, and

wherein a threshold voltage of the second transistor is greater than a threshold voltage of the third transistor and less than a threshold voltage of the first transistor.

9. The semiconductor device of claim 8 , wherein a work function of the third gate electrode is greater than a work function of the second gate electrode.

10. The semiconductor device of claim 8 , wherein the first to third transistors have the same conductivity type.

11. The semiconductor device of claim 8 , wherein a length of a channel portion of the third transistor is equal to a length of a channel portion of the second transistor.

12. The semiconductor device of claim 8 , wherein a width of a channel portion of the third transistor in the second direction is substantially equal to a width of a channel portion of the second transistor.

13. The semiconductor device of claim 8 , wherein a width of the single channel portion of the first transistor in the second direction is less than a width of a channel portion of the second transistor.

Priority Claims (1)
KR 10-2015-0175226 · Dec 9, 2015 · national
Continuity (2)
Division 15238059 · Aug 16, 2016
Related Publication 20190252555A1 · Aug 15, 2019