IP Library › Granted Patent US 10,784,810
Granted Patent B1
US 10,784,810 · App. 16/396,877 · Granted Sep 22, 2020

Motor controller with accurate current measurement

Inventor: Yisong Lu (Shrewsbury, MA)
Assignee: Allegro MicroSystems, LLC
H02P27/08H02P6/10H02P6/14
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Quick Facts
Patent No.
US 10,784,810
App. No.
16/396,877
Granted
Sep 22, 2020
Kind
B1
Abstract

A motor control system for reducing or eliminating current ripple error during current sampling comprises a motor having a plurality of phase coils, a motor driver circuit having a plurality of switches coupled to the plurality of phase coils to drive current through the phase coils, and a motor controller circuit configured to provide a plurality of output control signals coupled to the plurality of switches. A phase circuit modifies a first output control signal to produce a modified control signal that is out of phase with a second output control signal. A current measuring circuit is included to measure a current through the motor by measuring the current during a first time period when the first output control signal is active and measuring the current during a second time period when the modified control signal is active.

Claims (33)

1. A system comprising:

a motor having a plurality of phase coils;

a motor driver circuit having a plurality of switches coupled to the plurality of phase coils to drive current through the phase coils;

a motor controller circuit configured to provide a plurality of output control signals coupled to the plurality of switches, each output control signal associated with a respective phase coil to control the switches to drive current through the respective phase coil;

a phase circuit to modify a first output control signal of the plurality of output control signals to produce a modified control signal that is out of phase with a second output control signal of the plurality of output control signals; and

a current measuring circuit to measure a current through at least one of the phase coils by:

measuring the current during a first time period when the first output control signal is active; and

measuring the current during a second time period when the modified control signal is active.

2. The system of claim 1 wherein the current measuring circuit is further configured to average the current measured during the first time period and the current measured during the second time period.

3. The system of claim 1 wherein the plurality of phase coils comprises three phase coils.

4. The system of claim 3 wherein the plurality of output control signals comprises three output control signals.

5. The system of claim 1 wherein the plurality of output control signals are pulse-width modulated control signals.

6. The system of claim 5 wherein the first time period corresponds to a time period when the modified control signal is high and the second time period corresponds to a time period when the second output control signal is high.

7. The system of claim 1 wherein the modified control signal and the second output control signal are about 180 degrees out of phase.

8. The system of claim 1 wherein the current measuring circuit is configured to measure the current at a midpoint of the first time period and at a midpoint of the second time period.

9. The system of claim 1 further comprising a single shunt resistor coupled to the current measuring circuit.

10. The system of claim 1 wherein the phase circuit comprises a phase shift circuit that shifts the center of the first output control signal by a half-period.

11. A circuit comprising:

a motor driver circuit having a plurality of switches configured to be coupled to a plurality of phase coils of a motor to drive current through the plurality of phase coils of the motor;

a motor controller circuit configured to provide a plurality of output control signals coupled to the plurality of switches, each output control signal associated with a respective phase coil to control the switches to drive current through the respective phase coil;

a phase circuit to modify a first output control signal of the plurality of output control signals to produce a modified control signal that is out of phase with a second output control signal of the plurality of output control signals; and

a current measuring circuit to measure a current through at least one of the phase coils by:

measuring the current during a first time period when the modified control signal is active; and

measuring the current during a second time period when the second output control signal is active.

12. The circuit of claim 11 wherein the current measuring circuit is further configured to average the current measured during the first time period and the current measured during the second time period.

13. The circuit of claim 11 wherein the plurality of phase coils comprises three phase coils.

14. The circuit of claim 13 wherein the plurality of output control signals comprises three output control signals.

15. The circuit of claim 11 wherein the output control signals are pulse-width modulated control signals.

16. The circuit of claim 15 wherein the first time period corresponds to a time period when the modified control signal is high and the second time period corresponds to a time period when the second output control signal is high.

17. The circuit of claim 11 wherein the modified control signal and the second output control signal are about 180 degrees out of phase.

18. The circuit of claim 11 wherein the current measuring circuit is configured to measure the current at a midpoint of the first time period and at a midpoint of the second time period.

19. The circuit of claim 11 further comprising a single shunt resistor coupled to the current measuring circuit.

20. The circuit of claim 11 wherein the phase circuit comprises an inverter.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS AT REEL 053957/FRAME 0874 Recorded Nov 1, 2023
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 065420/0572 →
RELEASE OF SECURITY INTEREST IN PATENTS (R/F 053957/0620) Recorded Jun 22, 2023
From: MIZUHO BANK, LTD., AS COLLATERAL AGENT
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 064068/0360 →
PATENT SECURITY AGREEMENT Recorded Jun 22, 2023
From: ALLEGRO MICROSYSTEMS, LLC
To: MORGAN STANLEY SENIOR FUNDING, INC., AS THE COLLATERAL AGENT
Reel/Frame 064068/0459 →
PATENT SECURITY AGREEMENT Recorded Oct 1, 2020
From: ALLEGRO MICROSYSTEMS, LLC
To: MIZUHO BANK LTD., AS COLLATERAL AGENT
Reel/Frame 053957/0620 →
PATENT SECURITY AGREEMENT Recorded Oct 1, 2020
From: ALLEGRO MICROSYSTEMS, LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 053957/0874 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2019
From: YISONG LU
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 049018/0312 →
Cited By (5)
US 12,264,976 US 12,346,093 US 12,401,309 US 12,467,960 US 12,744,486