Hall element for 3-D sensing and method for producing the same
A method of forming a 3D Hall effect sensor and the resulting device are provided. Embodiments include forming a p-type well in a substrate; forming a first n-type well in a first region surrounded by the p-type well in top view; forming a second n-type well in a second region surrounding the p-type well; providing n-type dopant in the first and second n-type wells; and providing p-type dopant in the p-type well and the first n-type well.
1. A device comprising:
a shallow trench isolation (STI) region and a deep trench isolation (DTI) region formed in a substrate;
a p-type well formed in the substrate between the STI region in a top view;
a n-type well formed in the substrate and surrounded by the p-type well and the DTI region in the top view;
n-type dopant implanted in the n-type well; and
p-type dopant implanted in the p-type well,
wherein the device is configured to sense a magnetic field perpendicular and in-plane direction relative to the device,
wherein the n-type well is formed as a cross-shaped pattern in the top view,
wherein the p-type well is formed to surround the cross-shaped n-type well, and
wherein the DTI region provides isolation between a planar Hall element located in a first region of n-epitaxial growth in the top view and a vertical Hall element located in a second region of n-epitaxial growth extending vertically in the device in a cross section view.
2. The device according to claim 1 , wherein the substrate comprises a p-type substrate.
3. The device according to claim 2 , wherein the substrate further comprises a n-type substrate (n-sub) and the n-epitaxial growth formed over the n-sub.
4. The device according to claim 1 , further comprising:
a cover layer formed over the n-type well.
5. The device according to claim 4 , wherein the cover layer comprises a p-type cover, STI region or a layer of local oxidation of silicon (LOCOS).
6. The device according to claim 1 , wherein the second region is disposed between the DTI region and a second DTI region.
7. The device according to claim 6 , wherein the device is configured for four terminal sensing.
8. A device comprising:
a shallow trench isolation (STI) region and a deep trench isolation (DTI) region formed in a p-type substrate;
a p-type well formed in the substrate surrounded by the STI region in a top view;
a n-type well formed in a cross shape and surrounded by the p-type well and the DTI region in the top view;
n-type dopant formed in the first n-type well;
p-type dopant formed in the p-type well; and
one or more cover layers formed over the n-type well,
wherein the DTI region provides isolation between a planar Hall element located in a first region of n-epitaxial growth in the top view and a vertical Hall element located in a second region of n-epitaxial growth extending vertically in the device in a cross section view.
9. The device according to claim 8 , further comprising:
an interlayer dielectric (ILD) formed over the n-type and p-type wells; and
contacts formed in the ILD.
10. A device comprising:
a shallow trench isolation (STI) region and a deep trench isolation (DTI) region formed in a substrate;
a p-type well formed in the substrate surrounded by the STI region in a top view;
a n-type well surrounded by the p-type well and the DTI region in the top view;
n-type dopant formed in the n-type well; and
p-type dopant formed in the p-type well,
wherein the DTI region provides isolation between a planar Hall element located in a first region of n-epitaxial growth in the top view and a vertical Hall element located in a second region of n-epitaxial growth extending vertically in the device in a cross section view.
11. The device according to claim 10 , wherein the substrate comprises a p-type substrate.
12. The device according to claim 10 , wherein the substrate further comprises an n-type substrate (n-sub).
13. The device according to claim 12 , wherein the n-epitaxial growth is over the n-sub.
14. The device according to claim 10 , wherein the n-type well is formed as a cross-shaped pattern in the top view.
15. The device according to claim 14 , further comprising:
a cover layer formed over the n-type well,
wherein the cover layer comprises a p-type cover, or STI region.
16. The device according to claim 15 , further comprising:
a layer of local oxidation of silicon (LOCOS) formed over the cover layer or directly on the n-type well.
17. The device according to claim 15 , wherein the p-type well is formed to completely surround the cross-shaped n-type well.