IP Library Granted Patent US 10,910,032
Granted Patent B2
US 10,910,032 · App. 16/400,048 · Granted Feb 2, 2021

Magnetoresistive memory device with different write pulse patterns

Inventors: Tatsuya Kishi (Seongnam-si, KR); Tsuneo Inaba (Kanagawa, JP); Daisuke Watanabe (Seoul, KR); Masahiko Nakayama (Kanagawa, JP); Nobuyuki Ogata (Kanagawa, JP); Masaru Toko (Seoul, KR); Hisanori Aikawa (Seoul, KR); Jyunichi Ozeki (Seoul, KR); Toshihiko Nagase (Seoul, KR); Young Min Eeh (Seongnam-si, KR); Kazuya Sawada (Seoul, KR)
Assignee: TOSHIBA MEMORY CORPORATION
G11C11/1675G11C7/1096G11C11/1655G11C11/1657G11C11/1673
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Quick Facts
Patent No.
US 10,910,032
App. No.
16/400,048
Granted
Feb 2, 2021
Kind
B2
Abstract

A memory device includes a magnetoresistive element including first and second magnetic layers and a non-magnetic layer provided between the first and second magnetic layers. The memory device also includes a write circuit which controls a first writing setting magnetization of the first and second magnetic layers in a parallel state and a second writing setting the magnetization of the first and second magnetic layers in an antiparallel state, and applies a write current to the magnetoresistive element. A first write current in the first writing includes a first pulse and a second pulse added to the first pulse. A width of the second pulse is smaller than a width of the first pulse, and a current level of the second pulse is different from a current level of the first pulse.

Claims (37)

1. A memory device comprising:

a magnetoresistive element including first and second magnetic layers and a non-magnetic layer provided between the first and second magnetic layers; and

a write circuit which controls a first writing which sets magnetization of the first and second magnetic layers to a parallel state and a second writing which sets the magnetization of the first and second magnetic layers to an antiparallel state, wherein the write circuit applies a first write current to the magnetoresistive element in the first writing and a second write current different from the first write current to the magnetoresistive element in the second writing,

wherein:

the first write current comprises a first pulse and a second pulse added to the first pulse,

a width of the second pulse is smaller than a width of the first pulse,

a current level of the second pulse is different from a current level of the first pulse, and

the second write current is a single pulse.

2. The device of claim 1 , wherein the current level of the second pulse is higher than the current level of the first pulse.

3. The device of claim 1 , wherein the current level of the second pulse is lower than the current level of the first pulse.

4. The device of claim 1 , wherein:

the first write current further comprises a third pulse added to the first pulse,

a width of the third pulse is smaller than the width of the first pulse, and

a current level of the third pulse is different from the current level of the first pulse.

5. The device of claim 4 , wherein:

the current level of the second pulse is higher than the current level of the first pulse, and

the current level of the third pulse is lower than the current level of the first pulse.

6. The device of claim 4 , wherein:

the first write current further comprises fourth and fifth pulses added to the first pulse,

each width of the fourth and fifth pulses is smaller than the width of the first pulse,

a current level of the fifth pulse is different from a current level of the fourth pulse, and

an interval between the fourth pulse and the fifth pulse is different from an interval between the second pulse and the third pulse.

7. The device of claim 6 , wherein an interval between the third pulse and the fourth pulse is different from the interval between the second pulse and the third pulse.

8. The device of claim 1 , further comprising:

a first line electrically connected to a first terminal of the magnetoresistive element;

a second line electrically connected to a second terminal of the magnetoresistive element;

a third line provided between the first and second lines and electrically disconnected from the first line, the second line, and the magnetoresistive element; and

a driver which is connected to the third line and applies a voltage to the third line.

9. The device of claim 1 , further comprising:

a first line electrically connected to a first terminal of the magnetoresistive element; and

a second line electrically connected to a second terminal of the magnetoresistive element,

wherein the write circuit comprises a first driver which generates the first pulse by using a first power supply voltage, and a second driver which generates the second pulse by using a second power supply voltage.

10. The device of claim 1 , further comprising:

a first line electrically connected to a first terminal of the magnetoresistive element;

a second line electrically connected to a second terminal of the magnetoresistive element; and

a voltage generator which generates a voltage of a waveform in which a voltage level changes,

wherein the write circuit applies the first write current to the magnetoresistive element by using the voltage generated by the voltage generator.

Assignments (5)
CHANGE OF NAME AND ADDRESS Recorded Feb 4, 2022
From: K.K PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 058957/0124 →
CHANGE OF NAME AND ADDRESS Recorded Jan 31, 2022
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 058905/0582 →
MERGER Recorded Jan 31, 2022
From: TOSHIBA MEMORY CORPORATION
To: K.K PANGEA
Reel/Frame 058946/0675 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 1, 2019
From: KISHI, TATSUYA; INABA, TSUNEO; WATANABE, DAISUKE; NAKAYAMA, MASAHIKO; OGATA, NOBUYUKI; TOKO, MASARU; AIKAWA, HISANORI; OZEKI, JYUNICHI; NAGASE, TOSHIHIKO; EEH, YOUNG MIN; SAWADA, KAZUYA
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 049042/0277 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 1, 2019
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 049042/0508 →