IP Library Patent Application 16401141
Patent Application
App. No. 16/401,141

STRUCTURE AND METHOD TO SUPPRESS WORK FUNCTION EFFECT BY PATTERNING BOUNDARY PROXIMITY IN REPLACEMENT METAL GATE

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Quick Facts
Patent No.
US None
App. No.
16/401,141
Abstract

A semiconductor device includes a first transistor formed on a substrate, the first transistor including a channel region positioned on the substrate; a second transistor formed on the substrate, the second transistor including a channel region positioned on the substrate; a high-k dielectric layer disposed on the channel region of the first transistor and the channel region of the second transistor; a first transistor metal gate positioned in contact with the high-k dielectric on the first transistor; a second transistor metal gate positioned in contact with the high-k dielectric on the second transistor; an oxygen absorbing barrier disposed in contact with the high-k dielectric between the first transistor and the second transistor; and a conductive electrode material disposed on the first transistor, the second transistor, and the oxygen absorbing barrier.

Claims (34)

1 . A semiconductor device, comprising:

a first transistor formed on a substrate, the first transistor comprising a channel region positioned on the substrate;

a second transistor formed on the substrate, the second transistor comprising a channel region positioned on the substrate;

a high-k dielectric layer disposed on the channel region of the first transistor and the channel region of the second transistor;

a first transistor metal gate positioned in contact with the high-k dielectric on the first transistor;

a second transistor metal gate positioned in contact with the high-k dielectric on the second transistor, the first transistor metal gate also positioned on an in contact with the first transistor metal gate;

an oxygen absorbing barrier disposed in contact with the high-k dielectric between the first transistor and the second transistor; and

a conductive electrode material disposed on the first transistor metal gate on the first transistor and the second transistor.

2 . The semiconductor device of claim 1 , wherein the first transistor is an nFET.

3 . The semiconductor device of claim 2 , wherein the second transistor is a pFET.

4 . The semiconductor device of claim 1 , wherein the first transistor metal gate is TiN, TiC, and TiN, TiAl, Al, Ti, or a combination thereof.

5 . The semiconductor device of claim 1 , wherein the first transistor metal gate is a high oxygen absorbing metal.

6 . The semiconductor of claim 1 , wherein the first transistor metal gate comprises an oxygen absorbing material.

7 . The semiconductor device of claim 1 , wherein the second transistor metal gate comprises an oxygen providing material.

8 . The semiconductor device of claim 1 , wherein the oxygen absorbing barrier comprises a metal.

9 . The semiconductor device of claim 1 , wherein the oxygen absorbing barrier comprises an alkaline earth metal.

10 . The semiconductor device of claim 9 , wherein the oxygen absorbing barrier comprises a transition metal.

11 . A semiconductor device, comprising:

a first transistor formed on a substrate, the first transistor comprising a channel region positioned on the substrate;

a second transistor formed on the substrate, the second transistor comprising a channel region positioned on the substrate;

a high-k dielectric layer disposed on the channel region of the first transistor and the channel region of the second transistor, the high-k dielectric layer extending continuously over the channel region of the first transistor and the channel region of the second transistor;

a first transistor metal gate positioned in contact with the high-k dielectric on the first transistor;

a second transistor metal gate positioned in contact with the high-k dielectric on the second transistor, the first transistor metal gate also positioned on an in contact with the first transistor metal gate;

an oxygen absorbing barrier disposed in contact with the high-k dielectric between the first transistor and the second transistor; and

a conductive electrode material disposed on the first transistor metal gate on the first transistor and the second transistor.

12 . The semiconductor device of claim 11 , wherein the first transistor is an nFET.

13 . The semiconductor device of claim 12 , wherein the second transistor is a pFET.

14 . The semiconductor device of claim 11 , wherein the first transistor metal gate is TiN, TiC, and TiN, TiAl, Al, Ti, or a combination thereof.

15 . The semiconductor device of claim 11 , wherein the first transistor metal gate is a high oxygen absorbing metal.

16 . The semiconductor of claim 11 , wherein the first transistor metal gate comprises an oxygen absorbing material.

17 . The semiconductor device of claim 11 , wherein the second transistor metal gate comprises an oxygen providing material.

18 . The semiconductor device of claim 11 , wherein the oxygen absorbing barrier comprises a metal.

19 . The semiconductor device of claim 11 , wherein the oxygen absorbing barrier comprises an alkaline earth metal.

20 . The semiconductor device of claim 19 , wherein the oxygen absorbing barrier comprises a transition metal.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ELPIS TECHNOLOGIES INC.
Reel/Frame 052557/0327 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2019
From: BAO, RUQIANG; KWON, UNOH; ZHAO, KAI
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 049060/0202 →