IP Library › Granted Patent US 10,672,734
Granted Patent B2
US 10,672,734 · App. 16/403,641 · Granted Jun 2, 2020

Package structures and methods of forming the same

Inventors: Li-Hsien Huang (Hsinchu County, TW); An-Jhih Su (Taoyuan, TW); Hsien-Wei Chen (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L24/73H01L21/56H01L21/6835H01L23/3128H01L23/49822H01L24/19H01L24/20H01L24/32H01L25/0652H01L21/568H01L24/29H01L24/92H01L2224/04105H01L2224/12105H01L2224/2919H01L2224/29139H01L2224/32225H01L2224/73267H01L2224/92244H01L2924/14H01L2924/1431H01L2924/1436H01L2924/1437H01L2924/1443H01L2924/18162H01L2924/3511
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Quick Facts
Patent No.
US 10,672,734
App. No.
16/403,641
Granted
Jun 2, 2020
Kind
B2
Abstract

Package structures and methods of forming the same are disclosed. One of the package structures includes a first die, a second die, a dummy substrate and an encapsulant. A bottom surface of the second die is adhered to a top surface of the dummy substrate through a glue layer, and a total area of the bottom surface of the second die is different from a total area of the top surface of the dummy substrate. A total thickness of the first die is substantially equal to a total thickness of the second die, the dummy substrate and the glue layer. The encapsulant is disposed aside the first die, the second die and the dummy substrate.

Claims (32)

1. A package structure, comprising:

a first die;

a second die;

a semiconductor substrate comprising no active elements, wherein a bottom surface of the second die is adhered to a top surface of the semiconductor substrate through a glue layer, a total area of the bottom surface of the second die is different from a total area of the top surface of the semiconductor substrate, and a total thickness of the first die is substantially equal to only a total thickness of the second die, the semiconductor substrate and the glue layer; and

an encapsulant aside the first die, the second die and the semiconductor substrate.

2. The package structure of claim 1 , wherein the total area of the bottom surface of the second die is smaller than the total area of the top surface of the semiconductor substrate.

3. The package structure of claim 1 , further comprising a third die disposed over the first die and the second die.

4. The package structure of claim 3 , wherein the third die is adhered to a dielectric layer between the third die and at least one of the first die and the second die.

5. The package structure of claim 4 , further comprising a plurality of patterned conductive layers disposed between the dielectric layer and the at least one of the first die and the second die.

6. The package structure of claim 1 , further comprising a first adhesive layer on a bottom surface of the first die and a second adhesive layer on a bottom surface of the semiconductor substrate.

7. The package structure of claim 6 , wherein surfaces of the first adhesive layer, the second adhesive layer and the encapsulant are substantially coplanar.

8. The package structure of claim 1 , wherein the total area of the bottom surface of the second die is defined by a product of a first width and a first length of the second die, the total area of the top surface of the semiconductor substrate is defined by a product of a second width and a second length of the semiconductor substrate, the first width is smaller than the second width, and the first length is smaller than the second length.

9. The package structure of claim 8 , wherein a width of the first die is substantially the same as the second width of the semiconductor substrate.

10. The package structure of claim 1 , wherein the package structure is disposed in a package area, and an entire distance between a first edge of the package area and a first sidewall of the semiconductor substrate is substantially the same as an entire distance between the first edge of the package area and a first sidewall of the first die when viewing from the plan view.

11. The package structure of claim 10 , wherein an entire distance between a second edge opposite to the first edge of the package area and a second sidewall opposite to the first sidewall of the semiconductor substrate is substantially the same as the entire distance between the second edge of the package area and a second sidewall opposite to the first sidewall of the first die when viewing from the plan view.

12. A package structure, comprising:

a first die;

a second die;

a semiconductor substrate comprising no active elements, wherein a bottom surface of the second die is adhered to a topmost surface of the semiconductor substrate through a glue layer, a first surface of the glue layer is adhered to the bottom surface of the second die, a total area of the first surface of the glue layer is substantially equal to a total area of the bottom surface of the second die, a top surface of the second die is substantially coplanar with a top surface of the first die, and a total thickness of the first die is substantially equal to only a total thickness of the second die, the semiconductor substrate and the glue layer; and

an encapsulant aside the first die, the second die and the semiconductor substrate.

13. The package structure of claim 12 , wherein the total area of the bottom surface of the second die is smaller than a total area of the topmost surface of the semiconductor substrate.

14. The package structure of claim 12 , wherein the total area of the bottom surface of the second die is substantially equal to a total area of the topmost surface of the semiconductor substrate.

15. The package structure of claim 12 , wherein the first surface of the glue layer is flush against the entire bottom surface of the second die, and a second surface opposite to the first surface of the glue layer is flush against the topmost surface of the semiconductor substrate.

16. The package structure of claim 12 , wherein the bottom surface of the second die is substantially flush with the first surface of the glue layer.

17. A method of forming a package structure, comprising:

placing a first die on a carrier;

placing a semiconductor substrate comprising no active elements on the carrier;

adhering a bottom surface of a second die onto a topmost surface of the semiconductor substrate through a glue layer, wherein a first surface of the glue layer is adhered to the bottom surface of the second die, a total area of the bottom surface of the second die is substantially equal to a total area of the first surface of the glue layer, a top surface of the second die is substantially coplanar with a top surface of the first die, and a total thickness of the first die is substantially equal to only a total thickness of the second die, the semiconductor substrate and the glue layer; and

forming an encapsulant to encapsulate the first die, the second die and the semiconductor substrate.

18. The method of claim 17 , wherein the total area of the bottom surface of the second die is smaller than a total area of the topmost surface of the semiconductor substrate.

19. The method of claim 17 , wherein the total area of the bottom surface of the second die is substantially equal to a total area of the topmost surface of the semiconductor substrate.

20. The method of claim 17 , before placing onto the carrier, further comprising forming an adhesive layer on a bottom surface of at least one of the semiconductor substrate and the first die.

Continuity (2)
Continuation 15159810 · May 20, 2016
Related Publication 20190259727A1 · Aug 22, 2019