Semiconductor device and fabricating the same
The present disclosure provides a method for fabricating an integrated circuit device. The method includes providing a precursor including a substrate having first and second metal-oxide-semiconductor (MOS) regions. The first and second MOS regions include first and second gate regions, semiconductor layer stacks, and source/drain regions respectively. The method further includes laterally exposing and oxidizing the semiconductor layer stack in the first gate region to form first outer oxide layer and inner nanowire set, and exposing the first inner nanowire set. A first high-k/metal gate (HK/MG) stack wraps around the first inner nanowire set. The method further includes laterally exposing and oxidizing the semiconductor layer stack in the second gate region to form second outer oxide layer and inner nanowire set, and exposing the second inner nanowire set. A second HK/MG stack wraps around the second inner nanowire set.
1. A method comprising:
forming a first semiconductor layer over a substrate;
forming a second semiconductor layer over the first semiconductor layer;
forming a third semiconductor layer adjacent the first and second semiconductor layers to form a first source/drain feature, the third semiconductor layer being formed of a different material than the first and second semiconductor layers;
after the forming of the third semiconductor layer adjacent the first and second semiconductor layers to form the first source/drain feature, selectively removing a first portion of the first semiconductor layer, wherein the selectively removing of the first portion of the first semiconductor layer includes:
performing an oxidation process on the first semiconductor layer and the second semiconductor layer such that the second semiconductor layer is oxidized, the first portion of the first semiconductor layer is oxidized, and a second portion of the first semiconductor layer is not oxidized; and
selectively removing the oxidized second semiconductor layer and the oxidized first portion of the first semiconductor layer; and
forming a first gate stack around the second portion of the first semiconductor layer.
2. The method of claim 1 , wherein the first semiconductor layer is formed of a different material than the second semiconductor layer.
3. The method of claim 1 , wherein the second portion of the first semiconductor layer includes germanium.
4. The method of claim 1 , further comprising forming an anti-punch through feature on the substrate, and
wherein the forming of the first semiconductor layer on the substrate includes forming the first semiconductor layer directly on the anti-punch through feature.
5. The method of claim 4 , wherein the anti-punch through feature is exposed after the selectively removing of the oxidized second semiconductor layer and the oxidized first portion of the first semiconductor layer.
6. The method of claim 1 , further comprising:
forming a second gate stack over the second semiconductor layer;
forming a second source/drain feature associated with the second gate stack; and
removing the second gate stack prior to the selectively removing of the first semiconductor layer.
7. The method of claim 1 , wherein the first gate stack is part of a PMOS transistor.
8. A method comprising:
forming a first semiconductor layer over a gate region of a substrate;
forming a second semiconductor layer over the first semiconductor layer;
forming a third semiconductor layer over a source/drain region of the substrate to form a source/drain feature, the source/drain region being adjacent the gate region of the substrate and the third semiconductor layer being formed of a different material than the first and second semiconductor layers;
after the forming of the third semiconductor layer over the source/drain region of the substrate to form the source/drain feature, selectively removing the first semiconductor layer, wherein the selectively removing of the first semiconductor layer includes selectively etching the first semiconductor layer;
after the selectively removing the first semiconductor layer, oxidizing a portion of the second semiconductor layer such that a non-oxidized portion of the second semiconductor layer remains after the oxidizing of the portion of the second semiconductor layer; and
removing the oxidized portion of the second semiconductor layer; and
forming a gate stack around the non-oxidized portion of the second semiconductor layer.
9. The method of claim 8 , wherein the first semiconductor layer is formed of a different material than the second semiconductor layer.
10. The method of claim 8 , wherein the non-oxidized portion of the second semiconductor layer includes silicon.
11. The method of claim 8 , wherein the non-oxidized portion of the second semiconductor layer is exposed after the removing of the oxidized portion of the second semiconductor layer.
12. The method of claim 8 , wherein the oxidized portion of the second semiconductor layer include silicon oxide.
13. The method of claim 8 , wherein the forming of the second semiconductor layer over the first semiconductor layer includes forming the second semiconductor layer directly on the first semiconductor layer such that the second semiconductor layer physically contacts the first semiconductor layer.
14. The method of claim 8 , wherein the gate stack is part of a NMOS transistor.
15. A method comprising:
forming a first semiconductor layer over a first region of a semiconductor substrate;
forming a second semiconductor layer over the first semiconductor layer in the first region of the semiconductor substrate;
forming a third semiconductor layer over a second region of the semiconductor substrate;
forming a fourth semiconductor layer over the third semiconductor layer in the second region of the semiconductor substrate;
forming a fifth semiconductor layer adjacent the first and second semiconductor layers to form a source/drain feature, the fifth semiconductor layer being formed of a different material than the first and second semiconductor layers;
after the forming of the fifth semiconductor layer adjacent the first and second semiconductor layers to form the source/drain feature, selectively removing the first semiconductor layer in the first region, wherein the selectively removing of the first layer in the first region includes:
oxidizing a first portion of the first semiconductor layer in the first region without oxidizing a second portion of the first semiconductor layer; and
selectively removing the oxidized first portion of the first semiconductor layer;
selectively removing the third semiconductor layer in the second region;
forming a first gate structure surrounding the second portion of the first semiconductor layer; and
forming a second gate structure surrounding the fourth semiconductor layer.
16. The method of claim 15 , wherein the first region is a PMOS region and wherein the second region is an NMOS region.
17. The method of claim 15 , wherein the first semiconductor layer is formed of a different material than the second semiconductor layer, and
wherein the third semiconductor layer is formed of a different material than the fourth semiconductor layer.
18. The method of claim 17 , wherein the first semiconductor layer is formed of the same material as the third semiconductor layer, and
wherein the second semiconductor layer is formed of the same material as the fourth semiconductor layer.
19. The method of claim 15 , further comprising:
oxidizing a first portion of the fourth semiconductor layer in the second region without oxidizing a second portion of the fourth semiconductor layer; and
selectively removing the oxidized first portion of the fourth semiconductor layer, and
wherein the forming of the second gate structure surrounding the fourth semiconductor layer includes forming the second gate structure surrounding the second portion of the fourth semiconductor layer.
20. The method of claim 19 , wherein the oxidized first portion of the fourth semiconductor layer is formed of a different material than the oxidized first portion of the first semiconductor layer, and
wherein the oxidized first portion of the fourth semiconductor layer includes silicon and wherein the oxidized first portion of the first semiconductor layer includes germanium.