Method for manufacturing semiconductor structure
Methods of manufacturing a semiconductor structure are provided. One of the methods includes the following operations. A substrate is received, and the substrate includes a first transistor with a first conductive region and a second transistor with a second conductive region, wherein the first transistor and the second transistor have different conductive types. A first laser anneal is performed on the first conductive region to repair lattice damage. An amorphization is performed on the first conductive region and the second conductive region to enhance silicide formation to a desired phase transformation in the subsequent operations. A pre-silicide layer is formed on the substrate after the amorphization. A thermal anneal is performed to the substrate to form a silicide layer from the pre-silicide layer. A second laser anneal is performed on the first conductive region and the second conductive region after the formation of the pre-silicide layer.
1. A method for manufacturing a semiconductor structure, comprising:
receiving a substrate including a first transistor with a first conductive region and a second transistor with a second conductive region, wherein the first transistor and the second transistor have different conductive types;
performing a first laser anneal on the first conductive region;
performing a first amorphization on the first conductive region and the second conductive region;
forming a pre-silicide layer on the substrate;
performing a thermal anneal to the substrate to form a silicide layer; and
performing a second laser anneal on the first conductive region and the second conductive region after the formation of the pre-silicide layer,
wherein the first amorphization is performed after the first laser anneal.
2. The method of claim 1 , wherein the first laser anneal and the second laser anneal are within micro-seconds respectively.
3. The method of claim 1 , wherein the thermal anneal is a rapid thermal annealing, and a duration of the thermal anneal is in a range of 10-30 seconds.
4. The method of claim 1 , wherein the performance of the first laser anneal includes refining a grain structure of the first conductive region.
5. The method of claim 1 , wherein the first conductive region and the second conductive region are covered by a dielectric layer during the first laser anneal.
6. The method of claim 1 , wherein the second laser anneal is performed after the formation of the silicide layer.
7. The method of claim 1 , wherein the thermal anneal is performed after the second laser anneal.
8. The method of claim 1 , wherein the second laser anneal is performed after the thermal anneal.
9. The method of claim 1 , wherein a duration of the first laser anneal is in a range from 200 to 400 microseconds, and a temperature of the first laser anneal is in a range from 800 to 950 degrees Celsius.
10. The method of claim 1 , wherein the first amorphization includes implantation with elements selected from: germanium, silicon, argon, or any combination thereof.
11. The method of claim 1 , wherein a temperature of the thermal anneal is in a range from 500 to 650 degrees Celsius.
12. The method of claim 1 , wherein the silicide layer is formed in a designed phase transformation by the thermal anneal.
13. The method of claim 1 , wherein a duration of the second laser anneal is in a range from 200 to 400 microseconds, and a temperature of the second laser anneal is in a range from 800 to 950 degrees Celsius.
14. The method of claim 1 , wherein the first conductive region and the second conductive region include epitaxial regions.
15. The method of claim 1 , wherein the substrate further comprises a first amorphous structure in the first conductive region.
16. The method of claim 15 , wherein the first amorphous structure includes boron.
17. The method of claim 15 , wherein the performing the first laser anneal on the first conductive region comprises crystallizing the first amorphous structure.
18. The method of claim 15 , wherein the first amorphous structure is a lattice damaged structure.
19. The method of claim 18 , wherein ions are introduced into the lattice damaged structure by implantation.
20. The method of claim 1 , wherein the performing the first amorphization on the first conductive region and the second conductive region comprises forming a second amorphous structure and a third amorphous structure in the first conductive region and the second conductive regions, respectively.