Systems and methods of diagram transformation

1. A system comprising:

at least one processor; and

at least one memory having stored thereon computer program code that, when executed by the at least one processor, controls the processor to:

receive data indicative of a plurality of sequence diagrams, the data defining a flow of one or more applications;

for each of the plurality of sequence diagrams, generate a corresponding architecture diagram defining a logic structure of the one or more applications by:

identifying, within the data indicative of the sequence diagram, a plurality of participants within the sequence diagram;

transforming each of the plurality of participants into a respective node, creating a plurality of nodes;

identifying, within the data indicative of the sequence diagram, a plurality of messages; and

transforming the plurality of messages by establishing an edge between respective nodes of the plurality of nodes corresponding to message participants of a message of the plurality of messages;

merge the corresponding architecture diagrams of each of the plurality of sequence diagrams to generate a master architecture diagram;

receive an indication of a selection of a first sequence diagram of the plurality of sequence diagrams, a plurality of nodes and edges of the master architecture diagram having been created based on a plurality of participants and a plurality of messages of the selected first sequence diagram; and

emphasize, within the master architecture diagram and in response to receiving the indication of the selection of the first sequence diagram, the plurality of nodes and edges of the master architecture diagram created based on the plurality of participants and the plurality of messages of the selected first sequence diagram, thereby highlighting a flow of one or more applications within the logic structure of the architecture diagram.

2. The system of claim 1 , wherein the computer program code controls the processor to merge the corresponding architecture diagrams by:

identifying one or more co-present nodes within respective architecture diagrams of the corresponding architecture diagrams;

overlaying the respective architecture diagrams; and

removing redundant nodes and edges from the overlaid diagrams.

3. The system of claim 1 , wherein the computer program code further controls the processor to, for each of the plurality of sequence diagrams, generate a message listing from the plurality of messages, the message listing comprising a plurality of selectable message items corresponding to respective messages of the plurality of messages, wherein the message listing is separated from the master architecture diagram.

4. The system of claim 3 , wherein the computer program code controls the processor to merge the corresponding architecture diagrams by:

identifying one or more shared nodes between respective architecture diagrams of the corresponding architecture diagrams;

overlaying the respective architecture diagrams;

combining the message listings of the respective architecture diagrams; and

removing redundant nodes and edges from the overlaid diagrams.

5. The system of claim 4 , wherein the computer program code further controls the processor to:

receive an indication of a selection of a first sequence diagram of the plurality of sequence diagrams;

emphasize, within the master architecture diagram and in response to receiving the indication of the selection, a plurality of nodes and edges of the master architecture diagram corresponding to the selected first sequence diagram; and

emphasize, in response to receiving the indication of the selection, message items within the combined message listing corresponding to the selected first sequence diagram.

6. The system of claim 1 , wherein the computer program code controls the processor to receive the data indicative of the plurality of sequence diagrams by crawling a repository storing the plurality of sequence diagrams.

7. The system of claim 6 , wherein the computer program code further controls the processor to update the master architecture diagram by:

identifying, within the repository, alterations to at least one first participant or first message of the first sequence diagram, the first sequence diagram corresponding to a first architecture diagram of the corresponding architecture diagrams, a first node of the plurality of nodes of the first architecture diagram having been created based on the first participant of the first sequence diagram, and a first edge of the plurality of nodes of the first architecture diagram having been created based on the first message of the first sequence diagram;

modifying at least one of the first node or the first edge of the first architecture diagram based on the identified alterations to the at least one first participant or first message; and

merging the modified first architecture diagram with the master architecture diagram.

8. The system of claim 7 , wherein the computer program code further controls the processor to present, within the master architecture diagram, a selectable indicator to display either the un-updated master architecture diagram including the unmodified first architecture diagram or the updated master architecture diagram including the modified first architecture diagram.

9. The system of claim 6 , wherein the computer program code further controls the processor to update the master architecture diagram by:

identifying, from within the repository, a removal of a first sequence diagram of the plurality of sequence diagrams, a first architecture diagram of the corresponding architecture diagrams having been created based on the first sequence diagram; and

extracting, from the master architecture diagram, the first architecture diagram.

10. The system of claim 6 , wherein the computer program code further controls the processor to:

identify, within the repository, one or more documents corresponding to a first participant of the plurality of participants, the first participant corresponding to a first node of the plurality of nodes; and

link the one or more documents to the first node.

11. The system of claim 10 , wherein the computer program code further controls the processor to:

hot-link the one or more documents to the first node; and

in response to the first node being selected, launch the one or more documents.

12. The system of claim 1 , wherein the computer program code further controls the processor to:

determine, based on the master architecture diagram, total expected bandwidth requirement between two connected nodes of the master architecture diagram, the two connected being connected by an edge of the master architecture diagram; and

increase a bandwidth allocation between the two connected nodes based on the determined total bandwidth requirement.

13. A system comprising:

at least one processor; and

at least one memory having stored thereon computer program code that, when executed by the at least one processor, controls the processor to: identify a master architecture diagram corresponding to a plurality of sequence diagrams, each of the plurality of sequence diagrams comprising a plurality of participants and a plurality of messages, the master architecture diagram comprising a plurality of nodes corresponding to respective participants of the plurality of participants and a plurality of edges connecting the plurality of nodes, each of the plurality of edges corresponding to one or more messages of the plurality of messages;

detect, from within the plurality of sequence diagrams, an alteration to a first participant or first message of a first sequence diagram of the plurality of sequence diagrams, a first node of the first architecture diagram corresponding to the first participant of the first sequence diagram, and a first edge of the first architecture diagram corresponding to the first message of the first sequence diagram; and

modify the first node or the first edge of the master architecture diagram based on the detected alteration to the first participant or the first message;

receive an indication of a selection of a second sequence diagram of the plurality of sequence diagrams; and

emphasize, within the master architecture diagram and in response to receiving the indication of the selection of the second sequence diagram, a plurality of nodes and edges of the master architecture diagram corresponding to the plurality of participants and the plurality of messages of the selected second sequence diagram, thereby highlighting a flow of one or more applications within the architecture diagram.

14. The system of claim 13 , wherein the master architecture diagram comprises a representation of a merger of a plurality of individual architecture diagrams, each of the plurality of individual architecture diagrams corresponding to a respective sequence diagram of the plurality of sequence diagrams.

15. The system of claim 14 , wherein

a first individual architecture diagram of the plurality of individual architecture diagrams corresponds to the first sequence diagram, and

the computer program code further controls the processor to modify first node or the first edge of the master architecture diagram by:

extracting the first individual architecture diagram from the master architecture diagram;

modifying a first node or a first edge of the first individual architecture diagram based on the detected alteration; and

re-merging the modified first individual architecture diagram with the master architecture diagram.

16. The system of claim 13 , wherein the computer program code further controls the processor to detect the alteration to the first sequence diagram by monitoring change logs of the plurality of sequence diagrams.

17. A system comprising:

at least one processor; and

at least one memory having stored thereon computer program code that, when executed by the at least one processor, controls the processor to:

identify a master architecture diagram corresponding to a plurality of sequence diagrams, each of the plurality of sequence diagrams comprising a plurality of participants and a plurality of messages, the master architecture diagram comprising a plurality of nodes corresponding to respective participants of the plurality of participants and a plurality of edges connecting the plurality of nodes, each of the plurality of edges corresponding to one or more messages of the plurality of messages;

monitor a repository comprising the plurality of sequence diagrams;

identifying, from within the repository, a removal of a first sequence diagram of the plurality of sequence diagrams, the first sequence diagram corresponding to a first architecture diagram of the corresponding architecture diagrams; and

modify the master architecture diagram by removing nodes and edges of the master architecture diagram corresponding to participants and messages of only the first sequence diagram,

receive an indication of a selection of a second sequence diagram of the plurality of sequence diagrams; and

emphasize, within the master architecture diagram and in response to receiving the indication of the selection of the second sequence diagram, a plurality of nodes and edges of the master architecture diagram corresponding to the plurality of participants and the plurality of messages of the selected second sequence diagram, thereby highlighting a flow of one or more applications within the architecture diagram.

18. The system of claim 17 , wherein the master architecture diagram comprises a representation of a merger of a plurality of individual architecture diagrams, each of the plurality of individual architecture diagrams corresponding to a respective sequence diagram of the plurality of sequence diagrams.

19. The system of claim 18 , wherein

a first individual architecture diagram of the plurality of individual architecture diagrams corresponds to the first sequence diagram, and

the computer program code further controls the processor to modify the master architecture diagram by extracting the first individual architecture diagram from the master architecture diagram.