SILICON GERMANIUM-ON-INSULATOR FORMATION BY THERMAL MIXING
A layer of amorphous silicon is formed on a germanium-on-insulator substrate, or a layer of germanium is formed on a silicon-on-insulator substrate. An anneal is then performed which causes thermal mixing of silicon and germanium atoms within one of the aforementioned structures and subsequent formation of a silicon germanium-on-insulator material.
1 . A method of forming a silicon germanium-on-insulator (SGOI) material, the method comprising:
forming a structure comprising, from bottom to top, a germanium-on-insulator substrate and an amorphous silicon layer, wherein the germanium-on-insulator substrate comprises a germanium layer located directly on a surface of an insulator layer, and wherein the amorphous silicon layer is located directly on a topmost surface of the germanium layer;
forming an opening extending through the amorphous silicon layer and the germanium layer of the germanium-on-insulator substrate;
forming a dielectric structure within the opening, wherein the dielectric structure has a topmost surface below a topmost surface of the amorphous silicon layer and a sidewall surface that contacts a sidewall surface of the amorphous silicon layer, and a sidewall surface of the germanium layer; and
converting the structure into a silicon germanium-on-insulator material by annealing the structure containing the dielectric structure within an entirely inert ambient annealing environment, wherein during the annealing silicon atoms from the amorphous silicon layer diffuse into the germanium layer and intermix with germanium atoms in the germanium layer of the germanium-on-insulator substrate to form a silicon germanium layer directly on the surface of the insulator layer.
2 . The method of claim 1 , wherein the dielectric structure has a bottommost surface that directly contacts a surface of the insulator layer of the germanium-on-insulator substrate.
3 . The method of claim 1 , wherein the amorphous silicon layer is completely consumed by the annealing.
4 . The method of claim 1 , wherein the amorphous silicon layer is partially consumed by the annealing.
5 . The method of claim 1 , wherein the amorphous silicon layer is a hydrogenated amorphous silicon layer.
6 . The method of claim 1 , wherein the inert ambient is nitrogen (N 2 ) and the anneal is performed at a temperature from 600° C. to 900° C.
7 . The method of claim 1 , wherein the dielectric structure is composed of a trench dielectric material.
8 . The method of claim 7 , wherein the trench dielectric material is silicon dioxide.
9 . The method of claim 1 , wherein, after the converting, a sidewall of the silicon germanium layer is in direct physical contact with the sidewall surface of the dielectric structure.
10 . The method of claim 1 , further comprising forming, prior to the converting, a layer of a dielectric material on a physically exposed surface of both the amorphous silicon layer and the dielectric structure.
11 . A method of forming a silicon germanium-on-insulator (SGOI) material, the method comprising:
forming a structure comprising, from bottom to top, a germanium-on-insulator substrate, an amorphous silicon layer and a dielectric material, wherein the germanium-on-insulator substrate comprises a germanium layer located directly on a surface of an insulator layer, and wherein the amorphous silicon layer is located directly on a topmost surface of the germanium layer; and
converting the structure into a silicon germanium-on-insulator material by annealing the structure containing the dielectric material within an entirely inert ambient annealing environment, wherein during the annealing silicon atoms from the amorphous silicon layer diffuse into the germanium layer and intermix with germanium atoms in the germanium layer of the germanium-on-insulator substrate to form a silicon germanium layer directly on the surface of the insulator layer, wherein the dielectric material is formed directly on a surface of the amorphous silicon layer prior to the annealing.
12 . The method of claim 11 , wherein the amorphous silicon layer is completely consumed by the annealing.
13 . The method of claim 11 , wherein the amorphous silicon layer is partially consumed by the annealing.
14 . The method of claim 11 , further comprising thinning the dielectric material after the converting.
15 . The method of claim 11 , further comprising patterning the dielectric material after the converting.
16 . The method of claim 11 , wherein the dielectric material is a contiguous dielectric that spans an entirety of the amorphous silicon layer.
17 . The method of claim 11 , wherein the dielectric material is a dielectric metal oxide.
18 . The method of claim 11 , wherein the amorphous silicon layer is a contiguous material that spans an entirely of the germanium layer.
19 . The method of claim 11 , wherein the amorphous silicon layer is a hydrogenated amorphous silicon layer.
20 . The method of claim 11 , wherein the inert ambient is nitrogen (N 2 ) and the anneal is performed at a temperature from 600° C. to 900° C.