Germanium nanosheets and methods of forming the same
View Patent ↗Devices comprising germanium nanosheets are described herein. Methods of forming such germanium nanosheets and devices including such germanium nanosheets are also described.
1. A method, comprising:
receiving a wafer comprising a stack of alternating semiconductor layers on a substrate, the stack of alternating semiconductor layers comprising alternating layers of a group IV semiconductor and layers of germanium, wherein the group IV semiconductor comprises Sn in a concentration ranging from about 20.3% to about 25.5%;
shaping the stack of alternating semiconductor layers to have a first pad, a second pad, and a narrow portion between the first and second pads;
forming a plurality of germanium nanosheets by removing the narrow portion of the layers of the group IV semiconductor, wherein a width of the plurality of germanium nanosheets closer to the substrate is wider than a width of the plurality of germanium nanosheets further from the substrate; and
depositing a dielectric material that surrounds at least a portion of each of the plurality of germanium nanosheets.
2. The method of claim 1 , further comprising forming a layer of insulator on the stack of alternating semiconductor layers before shaping the stack of alternating semiconductor layers.
3. The method of claim 2 , wherein the layer of insulator is silicon dioxide (SiO 2 ).
4. The method of claim 3 , wherein shaping the stack of alternating semiconductor layers comprises:
forming a pattern on the layer of insulator; and
removing portions of the stack of alternating semiconductor layers around the pattern by reactive-ion etching.
5. The method of claim 4 , further comprising removing any remaining portions of the layer of insulator after shaping the stack of alternating semiconductor layers.
6. The method of claim 1 , wherein removing the narrow portion of the layers of the group IV semiconductor comprises selective wet etching.
7. The method of claim 1 , wherein the group IV semiconductor comprises SiSn.
8. The method of claim 1 , wherein a bottommost layer of the layers of the group IV semiconductor is polycrystalline.
9. The method of claim 1 , wherein the layers of germanium are under a tensile strain.
10. The method of claim 1 , wherein the layers of germanium are under a compressive strain.
11. The method of claim 1 , wherein a bottommost layer of the layers of the group IV semiconductor has a thickness from 1 nm to 100 nm.
12. A method, comprising:
forming a stack comprising:
a first layer of a group IV semiconductor on a substrate;
a second layer of germanium on the first layer;
a third layer of the group IV semiconductor on the second layer; and
a fourth layer of germanium on the third layer, wherein the group IV semiconductor comprises Sn in a concentration ranging from about 20.3% to about 25.5%; and
forming a first nanosheet and a second nanosheet by selectively wet etching portions of the first layer and the third layer to expose surfaces of the second layer and selectively wet etching a portion of the third layer to expose surfaces of the fourth layer, respectively.
13. The method of claim 12 , further comprising forming a dielectric layer on the first and second nanosheets, the dielectric layer surrounding at least a portion of the first and second nanosheets.
14. The method of claim 12 , further comprising shaping the stack to have a first pad, a second pad, and a narrow portion arranged between the first and second pads.
15. The method of claim 14 , wherein the shaping the stack comprises depositing an insulating layer on the stack, and removing a portion of the insulating layer and the stack using reactive-ion etching, focused ion beam (FIB), or both.
16. The method of claim 12 , wherein selectively wet etching the portion of the first layer and the portion of the third layer comprises soaking the first and third layers in an alkaline solution at a temperature ranging from about 50° C. to about 100° C. for a time ranging from about 5 minutes to about 30 minutes.
17. The method of claim 12 , wherein a width of the first nanosheet is greater than a width of the second nanosheet.
18. A method, comprising:
depositing a heterostructure on a substrate, the heterostructure comprising alternating layers of: (i) a group IV semiconductor comprising tin (Sn), and (ii) layers of germanium, wherein the group IV semiconductor is silicon-tin (SiSn), wherein the group IV semiconductor comprises Sn in a concentration ranging from about 20.3% to about 25.5%;
shaping the heterostructure into a shape having a first pad, a second pad, and a narrow portion between the first and second pads; and
forming a plurality of germanium nanosheets by removing the narrow portion of the layers of the group IV semiconductor.
19. The method of claim 18 , further comprising depositing a dielectric material that surrounds at least a portion of each of the plurality of germanium nanosheets.
20. The method of claim 18 , wherein after forming the plurality of germanium nanosheets, a width of a first germanium nanosheet of the plurality of germanium nanosheets is wider than a width of a second germanium nanosheet of the plurality of germanium nanosheets, wherein the first germanium nanosheet is closer to the substrate than the second germanium nanosheet.