IP Library Granted Patent US 11,018,067
Granted Patent B2
US 11,018,067 · App. 16/419,650 · Granted May 25, 2021

Semiconductor device and method of manufacturing a semiconductor device

Inventors: Kyeong Tae Kim (Incheon, KR); Yi Seul Han (Incheon, KR); Jae Beom Shim (Incheon, KR); Tae Yong Lee (Gyeonggi-do, KR)
Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
H01L23/3128H01L21/56H01L23/481H01L23/5226H01L23/5283H01L24/09
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Quick Facts
Patent No.
US 11,018,067
App. No.
16/419,650
Granted
May 25, 2021
Kind
B2
Abstract

In one example, a semiconductor device can comprise (a) an electronic device comprising a device top side, a device bottom side opposite the device top side, and a device sidewall between the device top side and the device bottom side, (b) a first conductor comprising, a first conductor side section on the device sidewall, a first conductor top section on the device top side and coupled to the first conductor side section, and a first conductor bottom section coupled to the first conductor side section, and (c) a protective material covering the first conductor and the electronic device. A lower surface of the first conductor top section can be higher than the device top side, and an upper surface of the first conductor bottom section can be lower than the device top side. Other examples and related methods are also disclosed herein.

Claims (139)

1. A semiconductor device comprising:

an electronic device comprising:

a device top side comprising a device first terminal;

a device bottom side opposite the device top side; and

a device first sidewall between the device top side and the device bottom side; and

a substrate comprising:

a dielectric material comprising:

a dielectric top section over the device top side, wherein the dielectric top section comprises a dielectric first opening over the device first terminal;

a dielectric side section over the device first sidewall and continuous with the dielectric top section; and

a dielectric bottom section comprising a lower surface substantially coplanar with the device bottom side and continuous with the dielectric side section;

and

a first conductive material comprising:

a first conductive top section over the dielectric top section and coupled to the device first terminal through the dielectric first opening;

a first conductive side section over the dielectric side section and continuous with the first conductive top section; and

a first conductive bottom section over the dielectric bottom section and continuous with the first conductive side section.

2. The semiconductor device of claim 1 , wherein:

the device bottom side defines a device bottom plane; and

an upper surface of the first conductive bottom section is closer to the device bottom plane than a lower surface of the first conductive top section.

3. The semiconductor device of claim 1 , wherein:

the first conductive side section is substantially orthogonal to the first conductive top section and to the first conductive bottom section; and

the first conductive top section and the first conductive bottom section do not substantially overlap each other.

4. The semiconductor device of claim 1 , further comprising:

an encapsulant over the substrate, bounding the device first sidewall, and comprising an encapsulant first sidewall;

wherein:

the dielectric bottom section comprises a dielectric first end exposed from and substantially coplanar with the encapsulant first sidewall; and

the first conductive bottom section comprises a first conductive endpoint covered by the encapsulant first sidewall, the first conductive endpoint being closer to the encapsulant first sidewall than any other point of the first conductive bottom section.

5. The semiconductor device of claim 1 , further comprising:

an electronic component comprising:

a component bottom side;

a component first terminal on the component bottom side; and

a component sidewall;

and

a first internal interconnect over the first conductive top section and coupled to the component first terminal.

6. The semiconductor device of claim 5 , wherein:

the electronic component comprises:

a component dielectric material over the component bottom side and exposing the component first terminal; and

a component conductive material over the component dielectric material, extending laterally from the component first terminal, and coupling the component first terminal to the first internal interconnect.

7. The semiconductor device of claim 5 , further comprising:

an encapsulant extending between the component bottom side and the substrate, bounding the device first sidewall and the first internal interconnect, and comprising an encapsulant first sidewall;

wherein the encapsulant first sidewall is substantially coplanar to the component sidewall and to a sidewall of the dielectric material.

8. The semiconductor device of claim 5 , wherein:

the component first terminal is coupled to the device first terminal, through the dielectric first opening, by the first internal interconnect and the first conductive top section.

9. The semiconductor device of claim 8 , wherein:

the first internal interconnect is laterally offset from the component first terminal and from the device first terminal.

10. The semiconductor device of claim 5 , further comprising:

a first external interconnect on a bottom of the substrate;

wherein the component first terminal is coupled to the first external interconnect by the first internal interconnect, the first conductive top section, the first conductive side section, and the first conductive bottom section of the substrate.

11. The semiconductor device of claim 10 , wherein:

the component first terminal is coupled to the device first terminal, through the dielectric first opening, by the first internal interconnect and the first conductive top section.

12. The semiconductor device of claim 1 , wherein:

the electronic device comprises:

a device second sidewall between the device top side and the device bottom side;

the dielectric side section extends over the device second sidewall; and

the substrate comprises a second conductive material comprising:

a second conductive top section over the dielectric top section;

a second conductive side section over the dielectric side section, over the device second sidewall, and continuous with the second conductive top section; and

a second conductive bottom section over the dielectric bottom section and continuous with the second conductive side section.

13. The semiconductor device of claim 12 , further comprising:

an electronic component comprising:

a component bottom side;

a component first terminal on the component bottom side;

a component second terminal on the component bottom side; and

a component sidewall;

a first internal interconnect coupled to the component first terminal;

a second internal interconnect coupled to the component second terminal;

a first external interconnect on a bottom of the substrate; and

a second external interconnect on the bottom of the substrate;

wherein:

the component first terminal is coupled to the device first terminal, through the dielectric first opening, by the first internal interconnect and the first conductive top section; and

the component second terminal is coupled to the second external interconnect by the second internal interconnect, the second conductive top section, the second conductive side section, and the second conductive bottom section.

14. A semiconductor device comprising:

a semiconductor device top side;

a semiconductor device bottom side opposite the semiconductor device top side; and

a semiconductor device sidewall between the semiconductor device top side and the semiconductor device bottom side;

an electronic device comprising:

an electronic device top side;

an electronic device bottom side opposite the electronic device top side; and

an electronic device sidewall between the electronic device top side and the electronic device bottom side;

a dielectric layer conformal with the electronic device top side, the electronic device sidewall, and the semiconductor device bottom side, wherein the dielectric layer comprises:

a dielectric layer first upper surface over the electronic device top side; and

a dielectric layer second upper surface over the semiconductor device bottom side,

wherein a distance between the dielectric layer first upper surface and the semiconductor device bottom side is greater than a distance between the dielectric layer second upper surface and the semiconductor device bottom side;

a first conductor that extends along the dielectric layer first upper surface and the dielectric layer second upper surface; and

a protective material covering the first conductor and the electronic device.

15. The semiconductor device of claim 14 , further comprising:

a first dielectric opening in the dielectric layer second upper surface and

an external interconnect coupled to the first conductor through the first dielectric opening in the dielectric layer second upper surface;

an electronic component comprising:

a component bottom side; and

a component first terminal on the component bottom side; and

a first internal interconnect coupled to the component first terminal and to the first conductor;

wherein the component first terminal is coupled to the external interconnect by the first conductor; and

wherein the protective material encapsulates the first internal interconnect and contacts the component bottom side.

16. The semiconductor device of claim 15 , wherein:

the electronic device comprises an electronic device first terminal on the electronic device top side; and

the component first terminal is coupled to the electronic device first terminal by the first internal interconnect and the first conductor.

17. The semiconductor device of claim 15 , wherein:

the protective material comprises a protective sidewall;

the electronic component comprises a component sidewall; and

the semiconductor device sidewall comprises a sidewall of the dielectric layer, the component sidewall, and the protective sidewall.

18. The semiconductor device of claim 14 , wherein the electronic device bottom side is exposed from the dielectric layer at the semiconductor device bottom side.

19. A method comprising:

providing an electronic device comprising:

a device top side comprising a device first terminal;

a device bottom side opposite the device top side; and

a device first sidewall between the device top side and the device bottom side; and

providing a substrate comprising:

a dielectric material comprising:

a dielectric top section over the device top side, wherein the dielectric top section comprises a dielectric first opening over the device first terminal;

a dielectric side section over the device first sidewall and continuous with the dielecteic top section; and

a dielectric bottom section comprising a lower surface substantially coplanar with the device bottom side and continuous with the dielectric side section; and

providing a first conductive material comprising:

a first conductive top section over the dielectric top section and coupled to the device first terminal through the dielectric first opening;

a first conductive side section over the dielectric side section and continuous with the first conductive top section; and

a first conductive bottom section over the dielectric bottom section and continuous with the first conductive side section.

20. The method of claim 19 , further comprising:

providing an electronic component comprising:

a component bottom side; and

a component first terminal on the component bottom side;

coupling a first internal interconnect with the component first terminal and the first conductive top section; and

coupling an external interconnect with the first conductive bottom section through the dielectric bottom section;

wherein:

providing the substrate comprises:

providing the dielectric material conformal to a contour of the electronic device;

providing the first conductive material comprises:

providing the first conductive material conformal to a contour of the dielectric material and the electronic device; and

providing a portion of the first conductive top section through the dielectric first opening and coupled to the device first terminal; and

coupling the external interconnect comprises:

coupling the component first terminal with the external interconnect by the first internal interconnect, the first conductive top section, the first conductive side section, and the first conductive bottom section.

21. The method of claim 19 , further comprising:

providing an encapsulant over the first conductive material, the dielectric material, and the electronic device;

wherein:

providing the substrate comprises:

providing the dielectric material conformal to a contour of the electronic device;

providing the first conductive material comprises:

providing the first conductive material conformal to a contour of the dielectric material and the electronic device; and

providing a portion of the first conductive material top section through the dielectric first opening and coupled to the device first terminal; and

providing the encapsulant comprises:

providing a bottom of the encapsulant conformal to the first conductive top section, the first conductive side section, and the first conductive bottom section.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 22, 2020
From: AMKOR TECHNOLOGY KOREA, INC.
To: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
Reel/Frame 052472/0162 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2019
From: KIM, KYEONG TAE; HAN, YI SEUL; SHIM, JAE BEOM; LEE, TAE YONG
To: AMKOR TECHNOLOGY KOREA, INC.
Reel/Frame 049257/0963 →
Continuity (1)
Related Publication 20200373214A1 · Nov 26, 2020