IP Library Granted Patent US 11,054,993
Granted Patent B2
US 11,054,993 · App. 16/424,329 · Granted Jul 6, 2021

Mass storage system having peer-to-peer data movements between a cache and a backend store

Inventors: Knut S. Grimsrud (Forest Grove, OR); Sanjeev N. Trika (Portland, OR)
Assignee: Intel Corporation
G06F3/0611G06F3/067G06F3/0646G06F3/0685G06F12/0862G06F12/0868G06F12/0891
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Quick Facts
Patent No.
US 11,054,993
App. No.
16/424,329
Granted
Jul 6, 2021
Kind
B2
Abstract

An apparatus is described. The apparatus includes peer-to-peer intelligence to be integrated into a mass storage system having a cache and a backing store. The peer-to-peer intelligence is to move data between the cache and backing store without the data passing through main memory.

Claims (31)

1. An apparatus, comprising:

peer-to-peer intelligence to be integrated into a mass storage system comprising a cache and a backing store, wherein the cache is to interface to a host through a first interface and the backing store is to interface to the host through a second interface, the peer-to-peer intelligence to move data between the cache and the backing store without the data passing through main memory of a host computing system, wherein the move of the data between the backing store and the cache comprises moving a neighboring sector of a sector in main memory that has been updated from the backing store to the cache.

2. The apparatus of claim 1 wherein the peer-to-peer intelligence at least partially resides in cache controller software that controls the cache.

3. The apparatus of claim 1 wherein the peer-to-peer intelligence at least partially resides in a peripheral controller.

4. The apparatus of claim 1 wherein the peer-to-peer intelligence at least partially resides in a mass storage device used to implement the cache.

5. The apparatus of claim 1 wherein the cache presents a storage interface to a host computing system that handles access requests from the host computing system that are serviced from the backing store.

6. The apparatus of claim 1 wherein another move of the data between the backing store and cache comprises insertion of a data from the backing store into the cache.

7. The apparatus of claim 6 wherein the another move of the data is performed commensurate with a second instance of the data being called up from the backing store and written to the main memory.

8. The apparatus of claim 6 wherein the another move of the data is performed as a pre-fetch of the data into the cache.

9. The apparatus of claim 1 wherein another move of the data between the cache and the backing store is an eviction of the data from the cache to the backing store.

10. A computing system, comprising:

a plurality of processing cores;

a main memory;

a main memory controller between the processing cores and the main memory;

one or more peripheral controllers; and,

a mass storage system comprising a cache and a backing store, the mass storage system comprising peer-to-peer intelligence, wherein the cache interfaces to the one or more peripheral controllers through a first interface and the backing store interfaces to the one or more peripheral controllers through a second interface, the peer-to-peer intelligence to move data between the cache and the backing store without the data passing through the main memory, wherein the move of the data between the backing store and the cache comprises moving a neighboring sector of a sector in main memory that has been updated from the backing store to the cache.

11. The computing system of claim 10 wherein the peer-to-peer intelligence at least partially resides in any of:

cache controller software that controls the cache;

a peripheral controller;

a mass storage device used to implement the cache; and

a mass storage device used to implement the backing store.

12. The computing system of claim 10 wherein another move of the data between the backing store and cache comprises insertion of a data item from the backing store into the cache.

13. The computing system of claim 12 wherein the another move of the data is performed commensurate with a second instance of the data being called up from the backing store and written to the main memory.

14. The computing system of claim 12 wherein the another move of the data is performed as a pre-fetch of data into the cache.

15. The computing system of claim 10 wherein another move of the data between the cache and the backing store is an eviction of the data from the cache to the backing store.

16. A machine readable storage medium, and not transitory electromagnetic signal energy, having store thereon program code that when processed by a processor of a computer causes the processor to perform a method, wherein the computer comprises one or more peripheral controllers, the method comprising:

moving data between a backing store of a storage system and a cache of the storage system without the data moving through a main memory of the computer wherein the cache is to interface to the one or more peripheral controllers through a first interface and the backing store is to interface to the one or peripheral controllers through a second interface, wherein the move of the data between the backing store and the cache comprises moving a neighboring sector of a sector that has been updated in main memory from the backing store to the cache.

17. The machine readable storage medium of claim 16 wherein another move of the data between the backing store and the cache comprises insertion of a data item from the backing store into the cache.

18. The machine readable storage medium of claim 17 wherein the another move of the data is performed commensurate with a second instance of the data being called up from the backing store and written to the main memory.

19. The machine readable storage medium of claim 17 wherein the another move of the data is performed as a pre-fetch of data into the cache.

20. The machine readable storage medium of claim 16 wherein another move of the data between the cache and the backing store is an eviction of the data from the cache to the backing store.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2025
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP. (DBA SOLIDIGM)
Reel/Frame 072851/0056 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 28, 2019
From: GRIMSRUD, KNUT S.; TRIKA, SANJEEV N.
To: INTEL CORPORATION
Reel/Frame 049626/0536 →
Continuity (1)
Related Publication 20190310776A1 · Oct 10, 2019
Cited By (1)
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