Transmit-receive port for half-duplex transceivers

1. A half-duplex transceiver, comprising:

an antenna;

antenna-side transformer windings coupled to the antenna;

a low-noise amplifier having an input;

an inductive matching network connecting the input of the low-noise amplifier to the antenna-side transformer windings;

a power amplifier;

amplifier-side transformer windings coupled to the power amplifier, the amplifier-side transformer windings magnetically coupled to the antenna-side transformer winding;

a transmit-receive switch connected to a node between the antenna-side transformer windings and the input of the low-noise amplifier, and to a ground node, the transmit-receive switch configured to selectively conduct and connect the node to ground;

wherein the half-duplex transceiver is configured to operate in a transmit mode and a receive mode and wherein the transmit-receive switch is configured to conduct in the transmit mode and to not conduct in the receive mode.

2. The half-duplex transceiver of claim 1 , wherein the transmit-receive switch comprises an n-type metal-oxide-semiconductor field-effect transistor (MOSFET).

3. The half-duplex transceiver of claim 1 , wherein the low-noise amplifier comprises an n-type metal-oxide-semiconductor field-effect transistor (MOSFET) and an inductor coupled to a gate of the n-type MOSFET and to the antenna-side transformer windings.

4. The half-duplex transceiver of claim 3 , further comprising:

a bias voltage source; and

a bias resistor coupled to the bias voltage source, the inductor, and the gate of the n-type MOSFET.

5. The half-duplex transceiver of claim 1 , wherein the low-noise amplifier comprises:

a first n-type metal-oxide-semiconductor field-effect transistor (MOSFET) having a source coupled to a ground node, a drain, and a gate; and

a second MOSFET having a source coupled to the drain of the first MOSFET, a gate coupled to a voltage source, and a drain coupled to a supply voltage node;

and wherein the inductive matching network comprises:

a gate inductor coupled between the antenna-side transformer windings and the gate of the first MOSFET.

6. The half-duplex transceiver of claim 5 , wherein the inductive matching network further comprises:

a source degeneration inductor coupling the source of the first MOSFET to the ground node.

7. The half-duplex transceiver of claim 6 , wherein the low-noise amplifier further comprises:

a load inductor coupling the drain of the second MOSFET to the supply voltage node.

8. A half-duplex transceiver, comprising:

an antenna;

antenna-side transformer windings coupled to the antenna;

a low-noise amplifier having an input;

a transmit-receive switch connected between a ground node and a node between the antenna-side transformer windings and the input of the low noise amplifier; and

an inductive matching network;

wherein the half-duplex transceiver is configured to operate in a receive mode in which the input of the low-noise amplifier is connected to the antenna-side transformer windings through the inductive matching network; and

wherein the half-duplex transceiver is configured to operate in a transmit mode in which the low-noise amplifier is de-coupled from the antenna-side transformer windings by the transmit-receive switch coupling the input of the low-noise amplifier to the ground node.

9. The half-duplex transceiver of claim 8 , wherein the transmit-receive switch is configured to not conduct in the receive mode.

10. The half-duplex transceiver of claim 8 , wherein the transmit-receive switch comprises an n-type metal-oxide-semiconductor field-effect transistor (MOSFET).

11. The half-duplex transceiver of claim 8 , further comprising:

a power amplifier; and

amplifier-side transformer windings coupled to the power amplifier;

wherein the amplifier-side transformer windings are magnetically coupled to the antenna-side transformer windings.

12. The half-duplex transceiver of claim 8 , wherein the low-noise amplifier comprises an n-type metal-oxide-semiconductor field-effect transistor (MOSFET) having a gate at the input of the low-noise amplifier;

and wherein the inductive matching network comprises a gate inductor coupled between the gate of the n-type MOSFET and to the antenna-side transformer windings.

13. The half-duplex transceiver of claim 12 , further comprising:

a bias voltage source; and

a bias resistor coupled to the bias voltage source, the inductor, and the gate of the n-type MOSFET.

14. The half-duplex transceiver of claim 8 , wherein the low-noise amplifier further comprises:

a second n-channel MOSFET having a source coupled to a drain of the first n-channel MOSFET, a gate coupled to a voltage source, and a drain coupled to a supply voltage node.

15. The half-duplex transceiver of claim 14 , wherein the inductive matching network further comprises:

a source degeneration inductor coupling the source of the first n-channel MOSFET to the ground node.

16. The half-duplex transceiver of claim 15 , wherein the low-noise amplifier further comprises:

a load inductor coupling the drain of the second n-channel MOSFET to the supply voltage node.