Solid-state imaging device, manufacturing method of solid-state imaging element, and imaging apparatus
There is provided solid-state imaging devices and methods of forming the same, the solid-state imaging devices including: a semiconductor substrate; a glass substrate; an adhesion layer provided between the semiconductor substrate and the glass substrate; and a warpage correction film provided adjacent to one of the semiconductor substrate and the glass substrate.
1. A package, comprising:
a first substrate including a plurality of photoelectric conversion elements;
a glass substrate;
an adhesion layer between the first substrate and the glass substrate;
a warpage correction film between the adhesion layer and the first substrate; and
a transparent resin layer between the first substrate and the warpage correction film, wherein a refractive index of the warpage correction film is between a refractive index of the transparent resin layer and a refractive index of the adhesion layer.
2. The package of claim 1 , wherein the warpage correction film is an organic film.
3. The package of claim 1 , wherein the warpage correction film is one of an acrylic film and an epoxy film.
4. The package of claim 1 , wherein the warpage correction film is one of an SiO 2 film, a TEOS film, an SiN film, an SiCO film, an SiCN film, and an SiC film.
5. The package of claim 1 , wherein a second substrate including a logic circuitry is bonded to the first substrate.
6. The package of claim 5 , wherein
the first substrate includes a first semiconductor substrate and a first wiring layer,
the second substrate includes a second semiconductor substrate and a second wiring layer, and
the first wiring layer and the second wiring layer are between the first semiconductor substrate and the second semiconductor substrate.
7. The package of claim 6 , wherein
the first wiring layer is made of Cu, Al or, and
the second wiring layer is made of Cu, Al or W.
8. The package of claim 6 , wherein the second substrate includes a through silicon via having an insulating layer and a connection conductor.
9. The package of claim 8 , wherein the through silicon via is electrically connected to a solder bump via a redistribution wire.
10. The package of claim 1 , wherein an edge of the glass substrate is coincident with an outer edge of the package.
11. The package of claim 1 , wherein the package is a chip size package.
12. The package of claim 1 , wherein the package is a cavity-less structure.
13. The package of claim 11 , wherein on-chip lenses are between the transparent resin layer and color filters.
14. The package of claim 1 , wherein the refractive index of the warpage correction film is from approximately 1.4 to approximately 1.5.
15. The package of claim 1 , wherein the glass substrate has a thickness equal to or less than 1 mm.
16. The package of claim 1 , wherein the semiconductor substrate has a thickness of between approximately 50 micrometers and approximately 300 micrometers.
17. The package of claim 9 , wherein the semiconductor substrate has a thickness of between approximately 50 micrometers and approximately 300 micrometers.
18. The package of claim 1 , wherein the adhesion layer and the warpage correction film have a total thickness of between approximately 1 micrometer and approximately 100 micrometers.
19. The package of claim 11 , wherein the adhesion layer and the warpage correction film have a total thickness of between approximately 1 micrometer and approximately 100 micrometers.
20. The package of claim 1 , wherein a thermal expansion coefficient of the first substrate is approximately 3 ppm/degrees Celsius, a thermal expansion coefficient of the glass substrate is between approximately 3 ppm/degrees Celsius and approximately 8 ppm/degrees Celsius, and a thermal expansion coefficient of the warpage correction film is between approximately 0.1 ppm/degrees Celsius and approximately 100 ppm/degrees Celsius.