IP Library Granted Patent US 11,240,020
Granted Patent B2
US 11,240,020 · App. 16/432,272 · Granted Feb 1, 2022

Techniques for securing and controlling access to data

Inventors: William C. Deleeuw (Beaverton, OR); Ned M. Smith (Beaverton, OR)
Assignee: INTEL CORPORATION
H04L9/0869G06F7/582G06F21/6218H04L63/0428H04L67/1002H04L2209/24
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,240,020
App. No.
16/432,272
Granted
Feb 1, 2022
Kind
B2
Abstract

Various embodiments are directed to techniques for controlling access to data in a decentralized manner. An apparatus includes an apportioning component to divide an item of data into multiple portions based on an organizational structure of the item of data; a tree component to generate a PRN tree including a multitude of nodes and a branching structure based on the organizational structure, the multitude including at least one branching node and multiple leaf nodes that correspond to the multiple portions; a PRN component to generate a PRN for each node of the multitude, the PRN component to use a PRN of a branching node of the PRN tree to generate a PRN for a leaf node that depends therefrom; and a communications component to transmit the multiple portions and multiple addresses based on PRNs of leaf nodes of the PRN tree to a server. Other embodiments are described and claimed.

Claims (58)

1. An apparatus, comprising:

a processor; and

memory comprising instructions that when executed by the processor cause the processor to:

identify a first pseudo random number (PRN) associated with a first node of a first PRN tree, the first PRN received pursuant to a first read access request associated with a first portion of data, and the first portion of the data associated with the first node of the first PRN tree;

determine an address for the first portion of the data based on the first PRN; and

access, at the address, the first portion of the data responsive to the read access request.

2. The apparatus of claim 1 , the memory comprising instructions that when executed by the processor cause the processor to:

identify a second PRN associated with a second node of the first PRN tree, the second PRN received pursuant a second read access request associated with a second portion of the data, and the second portion of the data associated with the second node of the first PRN tree, wherein the second node of the first PRN tree is higher in a hierarchical branching structure of the first PRN tree than the first node and the second portion of the data comprises the first portion of the data; and

utilize the second PRN to access the second portion of the data responsive to the second read access request.

3. The apparatus of claim 1 , the memory comprising instructions that when executed by the processor cause the processor to:

generate a second PRN based on the first PRN and a third PRN based on the first PRN;

utilize the second PRN to determine an address for the first portion of the data; and

utilize the third PRN to determine a key to decrypt the first portion of the data.

4. The apparatus of claim 1 , the memory comprising instructions that when executed by the processor cause the processor to generate a hash from the first PRN to determine the address to perform the first read access request for the first portion of the data.

5. The apparatus of claim 1 , the memory comprising instructions that when executed by the processor cause the processor to:

identify a second PRN associated with a second node of a second PRN tree, the second PRN received pursuant a write access request associated with the first portion of the data, and the first portion of data associated with the second node of the second PRN tree; and

utilize the second PRN to perform the write access request associated with the first portion of the data.

6. The apparatus of claim 5 , the memory comprising instructions that when executed by the processor cause the processor to:

identify the first PRN associated with the first node of the first PRN tree, the first PRN received pursuant the write access request associated with the first portion of the data; and

utilize the first PRN and the second PRN to perform the write access request associated with the first portion of the data.

7. The apparatus of claim 6 , the memory comprising instructions that when executed by the processor cause the processor to generate a hash from the first PRN and the second PRN to determine an address to perform the write access request for the first portion of the data.

8. The apparatus of claim 5 , the first PRN tree and the second PRN tree comprising a common number of nodes and a common branching structure.

9. The apparatus of claim 8 , the first node of the first PRN tree and the second node of the second PRN tree at a common location in the common branching structure.

10. The apparatus of claim 8 , the common branching structure based on an organizational structure of the data.

11. At least one non-transitory computer-readable medium comprising a set of instructions that, in response to being executed by a processor circuit, cause the processor circuit to:

identify a first pseudo random number (PRN) associated with a first node of a first PRN tree, the first PRN received pursuant a first read access request associated with a first portion of data, and the first portion of the data associated with the first node of the first PRN tree;

determine an address for the first portion of the data based on the first PRN; and

access, at the address, the first portion of the data responsive to the read access request.

12. The at least one non-transitory computer-readable medium of claim 11 , comprising instructions that, in response to being executed by the processor circuit, cause the processor circuit to:

identify a second PRN associated with a second node of the first PRN tree, the second PRN received pursuant a second read access request associated with a second portion of the data, and the second portion of the data associated with the second node of the first PRN tree, wherein the second node of the first PRN tree is higher in a hierarchical branching structure of the first PRN tree than the first node and the second portion of the data comprises the first portion of the data; and

utilize the second PRN to access the second portion of the data responsive to the second read access request.

13. The at least one non-transitory computer-readable medium of claim 11 , comprising instructions that, in response to being executed by the processor circuit, cause the processor circuit to:

generate a second PRN based on the first PRN and a third PRN based on the first PRN;

utilize the second PRN to determine an address for the first portion of the data; and

utilize the third PRN to determine a key to decrypt the first portion of the data.

14. The at least one non-transitory computer-readable medium of claim 11 , comprising instructions that, in response to being executed by the processor circuit, cause the processor circuit to generate a hash from the first PRN to determine the address to perform the first read access request for the first portion of the data.

15. The at least one non-transitory computer-readable medium of claim 11 , comprising instructions that, in response to being executed by the processor circuit, cause the processor circuit to:

identify a second PRN associated with a second node of a second PRN tree, the second PRN received pursuant a write access request associated with the first portion of the data, and the first portion of data associated with the second node of the second PRN tree; and

utilize the second PRN to perform the write access request associated with the first portion of the data.

16. The at least one non-transitory computer-readable medium of claim 15 , comprising instructions that, in response to being executed by the processor circuit, cause the processor circuit to:

identify the first PRN associated with the first node of the first PRN tree, the first PRN received pursuant the write access request associated with the first portion of the data; and

utilize the first PRN and the second PRN to perform the write access request associated with the first portion of the data.

17. The at least one non-transitory computer-readable medium of claim 16 , comprising instructions that, in response to being executed by the processor circuit, cause the processor circuit to generate a hash from the first PRN and the second PRN to determine an address to perform the write access request for the first portion of the data.

18. A computer-implemented method, comprising:

identifying a first pseudo random number (PRN) associated with a first node of a first PRN tree, the first PRN received pursuant a first read access request associated with a first portion of data, and the first portion of the data associated with the first node of the first PRN tree;

determining an address for the first portion of the data based on the first PRN; and

accessing, at the address, the first portion of the data responsive to the read access request.

19. The computer-implemented method of claim 18 , comprising:

identifying a second PRN associated with a second node of the first PRN tree, the second PRN received pursuant a second read access request associated with a second portion of the data, and the second portion of the data associated with the second node of the first PRN tree, wherein the second node of the first PRN tree is higher in a hierarchical branching structure of the first PRN tree than the first node and the second portion of the data comprises the first portion of the data; and

utilize the second PRN to access the second portion of the data responsive to the second read access request.

20. The computer-implemented method of claim 18 , comprising:

generating a second PRN based on the first PRN and a third PRN based on the first PRN;

utilizing the second PRN to determine an address for the first portion of the data; and

utilizing the third PRN to determine a key to decrypt the first portion of the data.

21. The computer-implemented method of claim 18 , comprising generating a hash from the first PRN to determine the address to perform the first read access request for the first portion of the data.

22. The computer-implemented method of claim 18 , comprising:

identifying a second PRN associated with a second node of a second PRN tree, the second PRN received pursuant a write access request associated with the first portion of the data, and the first portion of data associated with the second node of the second PRN tree; and

utilizing the second PRN to perform the write access request associated with the first portion of the data.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2025
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP. (DBA SOLIDIGM)
Reel/Frame 072890/0413 →
Continuity (3)
Continuation 15973172 · May 7, 2018
Continuation 14668634 · Mar 25, 2015
Related Publication 20190327087A1 · Oct 24, 2019