System and method for dividing the carrier center frequency of an RF modulated signal by a non-integer divisor

1. A method comprising:

receiving, from a modulator, a phase-modulated carrier output signal having a carrier center frequency that is a non-integer multiple of a desired carrier center frequency;

generating, by an injection-locked ring oscillator (ILRO), a plurality of phases of the phase-modulated carrier output signal at a plurality of outputs of the ILRO;

generating a decoupled fractional frequency output signal by sequentially selecting, using a multiplexer, successive outputs of the plurality of outputs corresponding to successive phases of the plurality of phases, the decoupled fractional frequency output signal having a center frequency equal to an integer multiple of the desired carrier center frequency; and

generating, based on the decoupled fractional frequency output signal, a desired phase-modulated carrier output signal that is decoupled from the modulator, the desired phase-modulated carrier output signal having a generated carrier center frequency equal to the desired carrier center frequency.

2. The method of claim 1 , further comprising:

transmitting the desired phase-modulated carrier output signal having the generated carrier frequency equal to the desired carrier center frequency, and

wherein an oscillation frequency of the ILRO is tuned to be substantially-near the carrier center frequency of the phase-modulated carrier output signal.

3. The method of claim 1 , wherein generating the plurality of phases further comprises:

tuning an oscillation frequency of the ILRO to be substantially-near the carrier center frequency.

4. The method of claim 1 , wherein generating the plurality of phases further comprises:

injecting, by an injection circuit coupled to the ILRO, the phase-modulated carrier output signal into the ILRO.

5. The method of claim 1 , wherein the carrier center frequency of the phase-modulated carrier output signal is 1.25 times the center frequency of the decoupled fractional frequency output signal.

6. The method of claim 1 , wherein receiving the phase-modulated carrier output signal comprises receiving phase-modulated carrier signals with phases of 0 degrees and 180 degrees.

7. The method of claim 1 , wherein generating, by the ILRO, the plurality of phases of the phase-modulated carrier output signal generates phases of 0, 90, 180, and 270 degrees.

8. The method of claim 1 , further comprising:

aligning the plurality of phases of the phase-modulated carrier output signal into a plurality of pairs of phases.

9. The method of claim 1 , wherein generating the desired phase-modulated carrier output signal based on the decoupled fractional frequency output signal comprises: dividing by 2 the center frequency of the decoupled fractional frequency output signal.

10. The method of claim 9 , wherein dividing by 2 the center frequency of the decoupled fractional frequency output signal comprises:

triggering a divide-by-2 output signal to go high upon a rising edge of the decoupled fractional frequency output signal; and

resetting the divide-by-2 output signal to low after an adjustable period of time,

wherein a center frequency of the divide-by-2 output signal is half the center frequency of the decoupled fractional frequency output signal.

11. The method of claim 1 , wherein sequentially selecting successive outputs of the plurality of outputs corresponding to successive phases of the plurality of phases comprises repeating a sequential process that comprises:

responsive to detecting a rising edge of a current phase of the plurality of phases, selecting a portion of a next phase of the plurality of phases;

setting a next portion of the decoupled fractional frequency output signal equal to the selected portion of the next phase; and

setting the current phase equal to the next phase.

12. The method of claim 11 , wherein the sequential process further comprises delaying the current phase prior to detecting the rising edge of the current phase.

13. An apparatus comprising:

a digitally-controlled oscillator (DCO) circuit configured to output a phase-modulated carrier output signal having a carrier center frequency that is a non-integer multiple of a desired carrier center frequency;

an injection-locked ring oscillator (ILRO) configured to generate a plurality of phases of the phase-modulated carrier output signal at a plurality of outputs of the ILRO; and

a fractional frequency division circuit coupled to the plurality of outputs of the ILRO, the fractional frequency division circuit configured to sequentially-select, using a multiplexer (MUX), successive outputs of the plurality of outputs corresponding to successive phases of the plurality of phases to generate a decoupled fractional frequency output signal having a center frequency equal to an integer multiple of the desired carrier center frequency.

14. The apparatus of claim 13 , wherein the ILRO is configured such that an oscillation frequency of the ILRO is tuned to be substantially-near the carrier center frequency of the phase-modulated carrier output signal.

15. The apparatus of claim 13 , further comprising:

an injection circuit coupled to the ILRO and to an output of the DCO circuit and configured to inject the phase-modulated carrier output signal into the ILRO; and

an integer frequency division circuit coupled to the fractional frequency division circuit and configured to generate, based on the decoupled fractional frequency output signal, a desired phase-modulated carrier output signal that is decoupled from the DCO circuit, the desired phase-modulated carrier output signal having a generated carrier center frequency equal to the desired carrier center frequency.

16. The apparatus of claim 15 , further comprising:

an amplifier configured to amplify the desired phase-modulated carrier output signal for transmission, and

wherein the integer frequency division circuit is configured to generate the desired phase-modulated carrier output signal based on the decoupled fractional frequency output signal by dividing by 2 the center frequency of the decoupled fractional frequency output signal,

wherein the integer frequency division circuit is further configured to trigger an integer frequency division output signal to go high upon a rising edge of the decoupled fractional frequency output signal and wherein the integer frequency division circuit is further configured to reset the integer frequency division output signal to low after an adjustable period of time, and

wherein a center frequency of the integer frequency division output signal is equal to half the center frequency of the fractional frequency output signal.

17. The apparatus of claim 13 , wherein the fractional frequency division circuit comprises the MUX and multiple delay flip-flops, the multiple delay flip-flops having respective outputs configured to sequentially select the successive outputs of the plurality of outputs corresponding to successive phases of the plurality of phases.

18. The apparatus of claim 13 ,

wherein the carrier center frequency of the phase-modulated carrier output signal is 1.25 times the center frequency of the decoupled fractional frequency output signal,

wherein the DCO circuit is configured to output the phase-modulated carrier output signal with phases of 0 degrees and 180 degrees,

wherein the ILRO is further configured to generate the phases of 0, 90, 180, and 270 degrees of the phase-modulated carrier output signal, and

wherein the fractional frequency division circuit is further configured to align the plurality of phases of the phase-modulated carrier output signal into a plurality of pairs of phases.

19. The apparatus of claim 13 , wherein the fractional frequency division circuit is configured to repeat a sequential process comprising:

responsive to detecting a rising edge of a current phase of the plurality of phases, selecting a portion of a next phase of the plurality of phases;

setting a next portion of the decoupled fractional frequency output signal equal to the selected portion of the next phase; and

setting the current phase equal to the next phase,

and

wherein the apparatus further comprises:

a delay element coupled to the fractional frequency division circuit and configured to delay the current phase prior to detecting the rising edge of the current phase.

20. An apparatus comprising:

a processor; and

a non-transitory computer-readable medium storing instructions that are operative, when executed by the processor, to perform the functions comprising:

receiving, from a modulator, a phase-modulated carrier output signal having a carrier center frequency that is a non-integer multiple of a desired carrier center frequency;

generating, by an injection-locked ring oscillator (ILRO), a plurality of phases of the phase-modulated carrier output signal at a plurality of outputs of the ILRO;

generating a decoupled fractional frequency output signal by sequentially selecting, using a multiplexer, successive outputs of the plurality of outputs corresponding to successive phases of the plurality of phases, the decoupled fractional frequency output signal having a center frequency equal to an integer multiple of the desired carrier center frequency; and

generating, based on the decoupled fractional frequency output signal, a desired phase-modulated carrier output signal that is decoupled from the modulator, the desired phase-modulated carrier output signal having a generated carrier center frequency equal to the desired carrier center frequency.