IP Library › Granted Patent US 11,183,443
Granted Patent B2
US 11,183,443 · App. 16/440,112 · Granted Nov 23, 2021

Semiconductor structure and method for manufacturing the same

Inventor: Liang-Pin Chou (Taoyuan, TW)
Assignee: NANYA TECHNOLOGY CORPORATION
H01L23/481H01L21/76838H01L21/76898H01L23/5226H01L23/53238
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Quick Facts
Patent No.
US 11,183,443
App. No.
16/440,112
Granted
Nov 23, 2021
Kind
B2
Abstract

A semiconductor structure and a method for manufacturing the same are disclosed. The semiconductor structure includes an underlying semiconductor layer, an insulation layer, a first through semiconductor via, a second through semiconductor via, and an upper conductive connecting portion. The insulation layer is disposed over the underlying semiconductor layer. The first through semiconductor via extends continuously through the insulation layer. The first through semiconductor via has a first upper end above the insulation layer. The second through semiconductor via extends continuously through the insulation layer. The second through semiconductor via has a second upper end above the insulation layer. The upper conductive connecting portion is laterally connected to a first upper lateral surface of the first upper end and a second upper lateral surface of the second upper end.

Claims (14)

1. A semiconductor structure, comprising:

an underlying semiconductor layer;

an insulation layer disposed over the underlying semiconductor layer;

a first through semiconductor via extending continuously through the insulation layer, wherein the first through semiconductor via has a first upper end above the insulation layer;

a second through semiconductor via extending continuously through the insulation layer, wherein the second through semiconductor via has a second upper end above the insulation layer; and

an upper conductive connecting portion laterally and directly contacted with a first upper lateral surface of the first upper end and a second upper lateral surface of the second upper end, wherein the first upper end of the first through semiconductor via and the second upper end of the second through semiconductor via are electrically connected by the upper conductive connecting portion, wherein the first through semiconductor via includes copper material, and the second through semiconductor via includes copper material, and the upper conductive connecting portion includes a conductive copper alloy.

2. The semiconductor structure of claim 1 , wherein the first through semiconductor via has a first via width and the second through semiconductor via has a second via width, and the first via width is greater than the second via width.

3. The semiconductor structure of claim 1 , wherein the upper conductive connecting portion is formed by a self-aligned deposition process.

4. The semiconductor structure of claim 1 , wherein the upper conductive connecting portion includes copper-germanium alloy (Cu x Ge y ).

5. The semiconductor structure of claim 1 , wherein the underlying semiconductor layer is a semiconductor substrate.

6. The semiconductor structure of claim 5 , wherein the first through semiconductor via extends continuously through the underlying semiconductor layer, and the second through semiconductor via extends continuously through the underlying semiconductor layer.

7. The semiconductor structure of claim 1 , further comprising a stack of semiconductor dies disposed over the underlying semiconductor layer.

8. The semiconductor structure of claim 1 , further comprising a first protection layer surrounding the first through semiconductor via and a second protection layer surrounding the second through semiconductor via.

9. The semiconductor structure of claim 8 , wherein the first protection layer includes tantalum material and tantalum nitride material, and the second protection layer includes tantalum material and tantalum nitride material.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2019
From: CHOU, LIANG-PIN
To: NANYA TECHNOLOGY CORPORATION
Reel/Frame 049541/0092 →
Continuity (1)
Related Publication 20200395273A1 · Dec 17, 2020