IP Library › Granted Patent US 11,183,457
Granted Patent B2
US 11,183,457 · App. 16/443,350 · Granted Nov 23, 2021

Semiconductor device, power converter, method for manufacturing semiconductor device, and method for manufacturing power converter

Inventors: Yasunari Hino (Tokyo, JP); Yo Tanaka (Tokyo, JP); Masao Kikuchi (Tokyo, JP)
Assignee: Mitsubishi Electric Corporation
H01L23/53228H01L23/3128H01L23/49H01L23/49562H01L23/49575H01L24/49H01L24/73H01L2224/04042H01L2224/05647H01L2224/484H01L2224/48091H01L2224/48228H01L2224/73265
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Quick Facts
Patent No.
US 11,183,457
App. No.
16/443,350
Granted
Nov 23, 2021
Kind
B2
Abstract

There is provided a semiconductor device including an insulating substrate provided with a circuit surface, and an external terminal bonded to the circuit surface. The circuit surface has an upper surface that is in contact with and bonded to a part of a lower surface of the external terminal. In at least a part of a portion where the upper surface of the circuit surface and the lower surface of the external terminal are in contact with each other, a melted portion of the circuit surface and the external terminal is formed. A gap between the upper surface of the circuit surface and the lower surface of the external terminal has a size of 20 μm or less. The circuit surface and the external terminal are each made of copper or copper alloy.

Claims (24)

1. A semiconductor device comprising:

a case including a side wall;

an insulating substrate disposed in an opening in the case defined by the side wall and provided at least on its upper surface with a circuit surface;

a semiconductor element disposed on an upper surface of the circuit surface via a bonding material; and

an external terminal bonded to the upper surface of the circuit surface, the external terminal having a portion extending into the side wall,

wherein

the upper surface of the circuit surface is in contact with and bonded to a part of a lower surface of the external terminal,

in at least a part of a portion where the upper surface of the circuit surface and the lower surface of the external terminal are in contact with each other, a melted portion of the circuit surface and the external terminal is formed,

a gap between the upper surface of the circuit surface and the lower surface of the external terminal at a tip of the external terminal has a size of 20 μm or less and greater than 0, and the gap begins at a point from the tip of the external terminal and increases in a direction toward the tip of the external terminal, and

the circuit surface and the external terminal are each made of copper or copper alloy.

2. The semiconductor device according to claim 1 , wherein a plurality of the melted portions is formed.

3. A semiconductor device comprising:

a case;

an insulating substrate disposed in the case and provided at least on its upper surface with a circuit surface;

a semiconductor element disposed on an upper surface of the circuit surface via a bonding material; and

an external terminal bonded to the upper surface of the circuit surface,

wherein

the upper surface of the circuit surface is in contact with and bonded to a part of a lower surface of the external terminal,

in at least a part of a portion where the upper surface of the circuit surface and the lower surface of the external terminal are in contact with each other, a melted portion of the circuit surface and the external terminal is formed,

a gap between the upper surface of the circuit surface and the lower surface of the external terminal has a size of 20 μm or less, and

the circuit surface and the external terminal are each made of copper or copper alloy,

the semiconductor device further comprising a sealing material injected in the case to cover the insulating substrate, the semiconductor element, and a part of the external terminal.

4. The semiconductor device according to claim 3 , further comprising a heat sink connected to a lower surface of the insulating substrate via a bonding material,

wherein a lower surface of the heat sink is exposed from the sealing material.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2019
From: HINO, YASUNARI; TANAKA, YO; KIKUCHI, MASAO
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 049493/0742 →
Priority Claims (1)
JP JP2018-137588 · Jul 23, 2018 · national
Continuity (1)
Related Publication 20200027839A1 · Jan 23, 2020