IP Library › Granted Patent US 10,840,898
Granted Patent B2
US 10,840,898 · App. 16/452,205 · Granted Nov 17, 2020

Semiconductor device and electronic control device

Inventor: Osamu Soma (Tokyo, JP)
Assignee: RENESAS ELECTRONICS CORPORATION
H03K17/04123H02J7/0031H03K17/163
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Quick Facts
Patent No.
US 10,840,898
App. No.
16/452,205
Granted
Nov 17, 2020
Kind
B2
Abstract

A semiconductor device and electronic control device capable of shutting off the reverse current flow from a load to a power supply is provided. The power transistor QN 1 is provided between the positive power supply terminal Pi 2 (+) and the load-driving terminal Po 2 (+), and has a source and a back-gate coupled to the positive power supply terminal Pi 2 (+). The power transistor QN 2 is provided in series with the power transistor QN 1 , and its sources and backgates are coupled to the load-driving terminal Po 2 (+). The booster CP 1 a charges the gates of the power transistors QN 1 . The gate discharge circuit DCG 1 a discharges the gate charge of the power transistor QN 1 to the source when the potential of the negative power supply terminal Pi 2 (−) is higher than the potential of the positive power supply terminal Pi 2 (+).

Claims (46)

1. A semiconductor device comprising:

a positive power supply terminal and a negative power supply terminal coupled to a power supply;

a load drive terminal coupled to a load, wherein a source and a back gate of a first power transistor is coupled to the positive power supply terminal and a drain of the first power transistor is coupled to the load drive terminal, wherein a source and a back gate of a second power transistor is coupled to the load drive terminal and a drain of the second power transistor is coupled to the positive power supply terminal;

a first boost circuit for charging a gate of the first power transistor; and

a first gate discharge circuit for discharging gate potential of the first power transistor to the source when the potential of the negative power terminal is higher than the potential of the positive power terminal,

wherein the first gate discharge circuit comprises an n-channel type short circuit transistor for shorting the gate of the first power transistor to the source when the potential of the negative power terminal is higher than the potential of the positive power terminal.

2. The semiconductor device according to claim 1 , wherein the semiconductor device is formed by a semiconductor package.

3. The semiconductor device according to claim 2 , wherein the first gate discharge circuit has a second resistor for passing a gate discharge current smaller than a gate charge current generated when a first booster circuit turns on the first power transistor.

4. The semiconductor device according to claim 2 , further comprising:

a second booster circuit for charging the gate of the second power transistor when a control input signal is asserted; and

a second gate discharge circuit for discharging the gate charge of the second power transistor to the source when the control input signal is negated.

5. The semiconductor device according to claim 1 , further comprising:

a negative potential detecting circuit for determining whether the negative potential applied to the positive power supply terminal is on a positive side or on a negative side of a predetermined negative threshold potential with reference to the negative power supply terminal, and for controlling the short circuit transistor to be on in a first case of the positive side, and for controlling a short-circuit transistor to be off in a second case of the negative side.

6. The semiconductor device according to claim 5 , wherein the negative potential detecting circuit has a first resistor and a first zener diode provided in series between the positive power supply terminal and the negative power supply terminal, and the negative potential detecting circuit determines whether the negative threshold potential is on the positive side or on the negative side by detecting whether the first zener diode breaks down.

7. The semiconductor device according to claim 5 , wherein the negative potential detecting circuit has a second zener diode having one end coupled to the positive power supply terminal, and in a second semiconductor device, a potential which is positive by a breakdown voltage of the second zener diode is applied to the gates of the first power transistors via a first booster circuit with reference to the potential of the positive power supply terminal.

8. The semiconductor device according to claim 5 , wherein the first power transistor has a lower pressure structure than the second power transistor.

9. The semiconductor device according to claim 1 , wherein the short circuit transistor is turned off when the potential of the positive power supply terminal is applied to the gate during an assertion period of a control input signal, and the semiconductor device further includes a capacitor that maintains the gate potential of the short circuit transistor during the assertion period of the control input signal during a negation period of the control input signal.

10. The semiconductor device according to claim 9 , further comprising:

a control transistor provided between the positive power supply terminal and the gate of the short circuit transistor, the control transistor controlling the gate of the short circuit transistor to be in a high-impedance condition by being controlled to be off in the negation period of the control input signal.

11. An electronic control device comprising:

a microcontroller and a relay device and a battery and a load,

wherein the relay device is comprising:

a positive power supply terminal and a negative power supply terminal coupled to the battery;

a load drive terminal coupled to the load, wherein a source and a back gate of a first power transistor is coupled to the positive power supply terminal and a drain of the first power transistor is coupled to the load drive terminal, wherein a source and a back gate of a second power transistor is coupled to the load drive terminal and a drain of the second power transistor is coupled to the positive power supply terminal;

a first boost circuit for charging a gate of the first power transistor; and

a first gate discharge circuit for discharging gate potential of the first power transistor to the source when the potential of the negative power terminal is higher than the potential of the positive power terminal,

wherein the first gate discharge circuit comprises an n-channel type short circuit transistor for shorting the gate of the first power transistor to the source when the potential of the negative power terminal is higher than the potential of the positive power terminal.

12. The electronic control device according to claim 11 , wherein the relay device further includes a negative potential detecting circuit for determining whether the negative potential applied to the positive power supply terminal is on a positive side or on a negative side of a predetermined negative threshold potential with reference to the negative power supply terminal, and for controlling the short circuit transistor to be on in a first case of the positive side, and for controlling a short-circuit transistor to be off in a second case of the negative side.

13. The electronic control device according to claim 12 , wherein the negative potential detecting circuit has a first resistor and a first zener diode provided in series between the positive power supply terminal and the negative power supply terminal, and the negative potential detecting circuit determines whether the negative threshold potential is on the positive side or on the negative side by detecting breakdown of the first zener diode.

14. The electronic control device according to claim 12 ,

wherein the negative potential detecting circuit has a second zener diode coupled one end to the positive power supply terminal, and

wherein in the second case, a potential which is positive by a breakdown voltage of the second zener diode is applied to the gate of the first power transistor via a first booster circuit with reference to the potential of the positive power supply terminal.

15. The electronic control device according to claim 12 , wherein the first power transistor has a lower pressure structure than the second power transistor.

16. The electronic control device according to claim 12 ,

wherein the short circuit transistor is turned off when the potential of the positive power supply terminal is applied to the gate during an assertion period of a control input signal, and

wherein the relay device further has a capacitor that maintains the gate potential of the short circuit transistor during the assertion period of the control input signal during a negation period of the control input signal.

17. The electronic control device according to claim 16 ,

wherein the relay device further has a control transistor provided between the positive power supply terminal and the gate of the short circuit transistor, and

wherein the control transistor controls the gate of the short circuit transistor to be in a high impedance condition by being turned off during the negation period of the control input signal.

18. The electronic control device according to claim 11 , wherein the electronic control device is mounted on a vehicle.

19. A semiconductor device comprising:

a positive power supply terminal and a negative power supply terminal coupled to a power supply;

a load drive terminal coupled to a load, wherein a source and a back gate of a first power transistor is coupled to the positive power supply terminal and a drain of the first power transistor is coupled to the load drive terminal, wherein a source and a back gate of a second power transistor is coupled to the load drive terminal and a drain of the second power transistor is coupled to the positive power supply terminal; and

a first boost circuit for charging a gate of the first power transistor; and

a first gate discharge circuit for discharging gate potential of the first power transistor to the source when the potential of the negative power terminal is higher than the potential of the positive power terminal,

wherein the first gate discharge circuit has a second resistor for passing a gate discharge current smaller than a gate charge current generated when a first booster circuit turns on the first power transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2019
From: SOMA, OSAMU
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 049657/0329 →
Priority Claims (1)
JP 2018-136573 · Jul 20, 2018 · national
Continuity (1)
Related Publication 20200028503A1 · Jan 23, 2020