Non-volatile memory with storage nodes having a radius of curvature
Storage node configurations are described. A storage node (e.g., a floating gate or a charge trap layer of a three-dimensional (3D) NAND flash device) include a channel-facing surface with a radius of curvature. For example, a channel-facing surface of the storage node may be concave. A control gate-facing surface of the storage node may instead, or additionally, also include a radius of curvature. The radius of curvature of the channel-facing and/or control gate-facing surfaces of the storage node is less than or equal to the radius of the channel layer.
1. An integrated circuit comprising:
a filled hole in a substrate, the filled hole including a semiconductor channel film;
a storage node surrounding the semiconductor channel film, the storage node having a radius of curvature, wherein the radius of curvature of the storage node is less than or equal to a radius of the semiconductor channel film; and
a control gate surrounding the storage node.
2. The integrated circuit of claim 1 , wherein:
a channel-facing side of the storage node includes a concave surface with the radius of curvature.
3. The integrated circuit of claim 1 , wherein:
a storage node-facing side of the semiconductor channel film includes a convex surface.
4. The integrated circuit of claim 2 , wherein:
the radius of the semiconductor channel film comprises a smallest radius of the semiconductor channel film; and
the radius of curvature of the concave surface on the channel-facing side of the storage node is less than the smallest radius of the semiconductor channel film.
5. The integrated circuit of claim 1 , wherein:
the storage node comprises a floating gate having the radius of curvature.
6. The integrated circuit of claim 5 , wherein:
a channel-facing side of the floating gate includes a concave surface with the radius of curvature.
7. The integrated circuit of claim 6 , wherein:
a control gate-facing side of the floating gate includes a concave surface with a second radius of curvature.
8. The integrated circuit of claim 7 , wherein:
the second radius of curvature is less than or equal to the radius of the semiconductor channel film.
9. The integrated circuit of claim 5 , wherein:
a storage node-facing side of the control gate includes a convex surface.
10. The integrated circuit of claim 5 , wherein:
a control gate-facing side of the floating gate includes a flat surface.
11. The integrated circuit of claim 5 , wherein:
the floating gate includes tapered upper and lower edges between a channel-facing side and a control gate-facing side of the floating gate; and
wherein a height of the floating gate is greater at the channel-facing side than at the control gate-facing side.
12. The integrated circuit of claim 11 , wherein:
the tapered upper and lower edges form a multi-faceted control gate-facing side of the floating gate.
13. The integrated circuit of claim 5 , wherein:
the floating gate includes non-tapered upper and lower edges between a channel-facing side and a control-gate facing side of the floating gate.
14. The integrated circuit of claim 1 , wherein:
the storage node comprises a charge trap layer having the radius of curvature.
15. The integrated circuit of claim 14 , wherein:
the charge trap layer is continuous between vertically adjacent cells.
16. The integrated circuit of claim 14 , wherein:
the charge trap layer is isolated from charge trap layers of vertically adjacent cells.
17. The integrated circuit of claim 1 , further comprising:
a plurality of vertically stacked NAND memory cells around the semiconductor channel film, the plurality of vertically stacked NAND memory cells having storage nodes with differing radiuses of curvature.
18. A non-volatile storage device comprising:
an array of NAND memory cells, a cell of the array including:
a storage node around a semiconductor channel film, the storage node including a radius of curvature that is less than or equal to a radius of the semiconductor channel film; and
control circuitry to access the array of NAND memory cells.
19. The non-volatile storage device of claim 18 , wherein:
a channel-facing side of the storage node includes a concave surface with the radius of curvature.
20. A system comprising:
a processor; and
a non-volatile storage device coupled with the processor, the non-volatile storage device comprising an array of NAND memory cells, a cell of the array including:
a storage node around a semiconductor channel film, the storage node including a radius of curvature that is less than or equal to a radius of the semiconductor channel film.
21. The system of claim 20 , wherein:
the non-volatile storage device comprises a NAND flash solid state drive (SSD) or a dual inline memory module (DIMM).