Techniques for joining dissimilar materials in microelectronics
Techniques for joining dissimilar materials in microelectronics are provided. Example techniques direct-bond dissimilar materials at an ambient room temperature, using a thin oxide, carbide, nitride, carbonitride, or oxynitride intermediary with a thickness between 100-1000 nanometers. The intermediary may comprise silicon. The dissimilar materials may have significantly different coefficients of thermal expansion (CTEs) and/or significantly different crystal-lattice unit cell geometries or dimensions, conventionally resulting in too much strain to make direct-bonding feasible. A curing period at ambient room temperature after the direct bonding of dissimilar materials allows direct bonds to strengthen by over 200%. A relatively low temperature anneal applied slowly at a rate of 1° C. temperature increase per minute, or less, further strengthens and consolidates the direct bonds. The example techniques can direct-bond lithium tantalate LiTaO 3 to various conventional substrates in a process for making various novel optical and acoustic devices.
1. A process for direct-bonding dissimilar materials in microelectronics, comprising:
obtaining a first substrate comprising a first material having a first crystal lattice with a first set of physical dimensions of first unit cells, the first material possessing a first coefficient of thermal expansion (CTE);
obtaining a second substrate comprising a second material having a second crystal lattice with a second set of physical dimensions of second unit cells, the second material possessing a second CTE, wherein the second CTE is different from the first CTE of the first material;
depositing a thin amorphous layer, the thin amorphous layer comprising an oxide, a carbide, a nitride, a carbonitride, or an oxynitride, on a surface of the first substrate and depositing another thin amorphous layer on the second substrate, wherein each of the thin amorphous layers is a direct-bonding intermediary between the first substrate and the second substrate, each of the thin amorphous layers having a thickness between approximately 100 nm and approximately 1000 nm; and
direct-bonding the first substrate and the second substrate together at an ambient room temperature to make a joined stack.
2. The process of claim 1 , further comprising maintaining the joined stack at the ambient room temperature for at least 48 hours.
3. The process of claim 1 , further comprising:
prior to the direct-bonding of the first wafer and the second wafer together, plasma activating the bonding surfaces of the first wafer and the second wafer; and
exposing the plasma-activated bonding surfaces to NH 4 OH (ammonium hydroxide).
4. The process of claim 1 , further comprising:
prior to the direct-bonding of the first wafer and the second wafer together, plasma activating the bonding surfaces of the first wafer and the second wafer; and
exposing the plasma-activated bonding surfaces to deionized water.
5. The process of claim 1 , further comprising raising the temperature of the joined stack from 50° C. to 100° C. at a rate of temperature increase about 1 degree per minute or less.
6. The process of claim 1 , wherein the first material of the first substrate comprises lithium tantalate (LiTaO 3 ) or lithium niobate (LiNbO 3 ), and the second material of the second substrate comprises silicon (Si), quartz, fused silica glass, sapphire, or a glass.
7. The process of claim 1 , further comprising:
planarizing a bonding surface of each of the first substrate and the second substrate with chemical mechanical planarization (CMP) before the direct-bonding at the ambient room temperature;
cleaning the planarized surfaces with a PVA brush scrubbing process and a deionized water rinse process;
further cleaning the planarized surfaces with a Megasonic SC1 process and rinsing with deionized water; and
spin drying the cleaned surfaces.
8. The process of claim 7 , further comprising plasma activating the cleaned surfaces with nitrogen plasma in RIE mode with a bias voltage of −200 to −300 volts.
9. The process of claim 8 , further comprising spray rinsing the plasma-activated surfaces with a 29% NH 4 OH solution to fortify subsequent direct bonds.
10. The process of claim 1 , wherein the first material of the first substrate forms a device when direct-bonded to the second material of the second substrate, the device selected from the group consisting of an acoustic filter, a surface acoustic wave (SAW) device, a sensor on a processor, a light emitting diode (LED), an infrared (IR) sensor, a VIS sensor, a projector on a processor, an image sensor, an optical device, and a light detection and ranging (LIDAR) device.
11. The process of claim 1 , wherein the thin amorphous layer comprises silicon.
12. The process of claim 1 , wherein the first set of physical dimensions of first unit cells is different than the second set of physical dimensions of second unit cells.
13. A process for direct-bonding dissimilar materials in microelectronics, comprising:
obtaining a first substrate comprising a first material having a first crystal lattice with a first set of physical dimensions of first unit cells, the first material possessing a first coefficient of thermal expansion (CTE);
obtaining a second substrate comprising a second material having a second crystal lattice with a second set of physical dimensions of second unit cells, the second material possessing a second CTE, wherein the second CTE is different from the first CTE of the first material;
depositing a thin amorphous layer, the thin amorphous layer comprising an oxide, a carbide, a nitride, a carbonitride, or an oxynitride, on a surface of the first substrate and depositing another thin amorphous layer on the second substrate, wherein each of the thin amorphous layers is a direct-bonding intermediary between the first substrate and the second substrate, each of the thin amorphous layers having a thickness between approximately 100 nm and approximately 1000 nm;
direct-bonding the first substrate and the second substrate together at an ambient room temperature to make a joined stack; and
raising the temperature of the joined stack to around 50° C. at a rate of about 1° C. per minute or less.
14. The process of claim 13 , further comprising raising the temperature of the joined stack to around 100° C. at a rate of about 1° C. per minute or less, when one of the materials is silicon.
15. The process of claim 13 , further comprising plasma activating the first substrate with nitrogen plasma in RIE mode with a bias voltage of −200 to −300 volts and plasma activating the second substrate with oxygen plasma in RIE mode with a bias voltage of −200 to −300 volts.
16. The process of claim 13 , wherein the first set of physical dimensions of first unit cells is different than the second set of physical dimensions of second unit cells.
17. A process for direct-bonding dissimilar materials in microelectronics, comprising:
obtaining a first substrate comprising a first material having a first crystal lattice with a first set of physical dimensions of first unit cells, the first material possessing a first coefficient of thermal expansion (CTE);
obtaining a second substrate comprising a second material having a second crystal lattice with a second set of physical dimensions of second unit cells, the second material possessing a second CTE, wherein the second CTE is different from the first CTE of the first material;
depositing a thin amorphous layer, the thin amorphous layer comprising an oxide, a carbide, a nitride, a carbonitride, or an oxynitride, on a surface of the first substrate and depositing another thin amorphous layer on the second substrate, wherein each of the thin amorphous layers is a direct-bonding intermediary between the first substrate and the second substrate, each of the thin amorphous layers having a thickness between approximately 100 nm and approximately 1000 nm;
direct-bonding the first substrate and the second substrate together at an ambient room temperature to make a joined stack; and
maintaining the joined stack at the ambient room temperature for at least approximately 48 hours and then raising the temperature of the joined stack to around 50° C. at a rate of about 1° C. temperature increase per minute, or less.
18. The process of claim 17 , wherein the first material of the first substrate comprises lithium tantalate (LiTaO 3 ) or lithium niobate (LiNbO 3 ), and the second material of the second substrate comprises silicon (Si), quartz, fused silica glass, sapphire, or a glass.
19. The process of claim 17 , wherein the first set of physical dimensions of first unit cells is different than the second set of physical dimensions of second unit cells.