Radiation-emitting semiconductor chip

1. A radiation-emitting semiconductor chip comprising:

a carrier comprising:

a first main surface and a second main surface opposite to the first main surface;

an n-doped layer and a p-doped layer forming a pn-junction; and

a vertical region starting from the first main surface and running parallel to side faces of the carrier, wherein the vertical region is n-doped, p-doped or electrically insulating, and wherein the vertical region extends within a boundary region of the carrier and completely encloses a central volume region of the carrier;

an epitaxial semiconductor layer sequence having an active zone configured to generate electromagnetic radiation during operation, the epitaxial semiconductor layer sequence being located at the first main surface of the carrier; and

two electrical contacts disposed on a front side of the radiation-emitting semiconductor chip.

2. The radiation-emitting semiconductor chip according to claim 1 , wherein the carrier is a silicon carrier.

3. The radiation-emitting semiconductor chip according to claim 1 , wherein the vertical region does not completely penetrate the carrier along side faces of the radiation-emitting semiconductor chip.

4. The radiation-emitting semiconductor chip according to claim 1 , wherein a surface region of the first main surface of the carrier comprises a material of the vertical region, and wherein a dielectric layer is located at the surface region of the first main surface of the carrier.

5. The radiation-emitting semiconductor chip according to claim 4 , further comprising a metallic layer partially covering the dielectric layer and located at the first main surface of the carrier starting from the side faces of the carrier.

6. The radiation-emitting semiconductor chip according to claim 5 , wherein the vertical region is n-doped or p-doped and forms together with the dielectric layer and the metallic layer a self-locking MOSFET.

7. The radiation-emitting semiconductor chip according to claim 1 , further comprising a dielectric layer in the vertical region starting from the first main surface of the carrier so that the dielectric layer is flush with the first main surface of the carrier.

8. The radiation-emitting semiconductor chip according to claim 7 , further comprising a metallic layer partially covering the dielectric layer and located at the first main surface of the carrier starting from the side faces of the carrier.

9. The radiation-emitting semiconductor chip according to claim 8 , wherein the vertical region is n-doped or p-doped and forms together with the dielectric layer and the metallic layer a self-locking MOSFET.

10. The radiation-emitting semiconductor chip according to claim 1 , wherein the p-doped layer in places forms the first main surface of the carrier and the n-doped layer in places forms the second main surface of the carrier, and wherein the vertical region is n-doped.

11. The radiation-emitting semiconductor chip according claim 1 , wherein the n-doped layer in places forms the first main surface of the carrier and the p-doped layer in places forms the second main surface of the carrier, and wherein the vertical region is p-doped.

12. The radiation-emitting semiconductor chip according to claim 1 , wherein the vertical region is electrically insulating and penetrates the pn-junction of the carrier.

13. The radiation-emitting semiconductor chip according to claim 1 , further comprising an electrically insulating layer covering the vertical region and arranged between the first main surface of the carrier and the epitaxial semiconductor layer sequence starting from the side faces of the radiation-emitting semiconductor chip, wherein the epitaxial semiconductor layer sequence also covers the vertical region.

14. The radiation-emitting semiconductor chip according to claim 13 , wherein the vertical region is n-doped or p-doped and together with a dielectric layer and a metallic layer forms a self-locking MOSFET, wherein the electrically insulating layer completely covers the metallic layer, wherein a remaining portion of the first main surface of the carrier is free of the electrically insulating layer, and wherein the epitaxial semiconductor layer sequence also covers the vertical region.

15. The radiation-emitting semiconductor chip according to claim 1 , wherein the epitaxial semiconductor layer sequence is located only at a central surface region of the first main surface of the carrier.

16. A radiation-emitting semiconductor chip comprising:

a carrier comprising:

a first main surface and a second main surface opposite to the first main surface;

an n-doped layer and a p-doped layer forming a pn-junction; and

a vertical region which, starting from the first main surface of the carrier, runs parallel to side faces of the carrier, the vertical region being n-doped, p-doped or electrically insulating;

an epitaxial semiconductor layer sequence having an active zone configured to generate electromagnetic radiation during operation, the epitaxial semiconductor layer sequence being located at the first main surface of the carrier; and

two electrical contacts disposed on a front side of the radiation-emitting semiconductor chip.