Display panel, manufacturing method thereof, and display device

1. A display panel comprising:

a base substrate, and

a display area and a non-display area provided on the base substrate,

wherein a data line is provided in the display area and a detection line is provided in the non-display area; and the detection line is electrically connected to the data line and comprises a plurality of wire segments, and the plurality of wire segments overlap to form the detection line;

the entire detection line extends on a surface of the base substrate along an extension direction parallel to the surface of the base substrate, all of the plurality of wire segments extend along the extension direction and are sequentially arranged along the extension direction, two adjacent wire segments of the plurality of wire segments are respectively a previous segment and a next segment, the previous segment has a first end close to the next segment in the extension direction, the next segment has a first end close to the previous segment in the extension direction, the first end of the previous segment overlaps and directly contacts the first end of the next segment;

wherein the plurality of wire segments comprise first wire segments and other wire segments beside the first wire segments, and a spacer is disposed between the first wire segments and the base substrate;

wherein the other wire segments comprise second wire segments, and

the first wire segments are alternately arranged with the second wire segments, and are overlapped on the second wire segments, respectively;

one of the first wire segments and one of the second wire segments that are adjacent to each other constitute the two adjacent wire segments of the plurality of wire segments; and

wherein a first target conductive layer, a first target insulating layer and a second target conductive layer, which are sequentially formed, are further disposed in the display area on the base substrate;

the second wire segments are arranged in a same layer as the first target conductive layer;

the first insulating layer is arranged in a same layer as the first target insulating layer; and

the first wire segments are arranged in a same layer as the second target conductive layer.

2. The display panel according to claim 1 , wherein

the spacer comprises a first insulating layer, which is located on the second wire segments and covers the non-display area;

the first insulating layer is provided with first via holes in communication with the second wire segments; and

the first wire segments are arranged on the first insulating layer and overlap and in contact with the second wire segments through the first via holes, respectively.

3. The display panel according to claim 2 , wherein

a first target conductive layer, a first target insulating layer and a second target conductive layer, which are sequentially formed, are further disposed in the display area on the base substrate;

the second wire segments are arranged in a same layer as the first target conductive layer;

the first insulating layer is arranged in a same layer as the first target insulating layer; and

the first wire segments are arranged in a same layer as the second target conductive layer.

4. The display panel according to claim 3 , wherein

a thin film transistor with a top gate structure and a storage capacitor are further disposed in the display area on the base substrate;

the thin film transistor comprises an active layer, a first gate insulating layer, a gate electrode, a second gate insulating layer, a source-drain insulating layer and a source-drain pattern, which are sequentially arranged on the base substrate;

the storage capacitor comprises a first electrode, a capacitor insulating layer, and a second electrode, which are sequentially arranged on the base substrate;

the first target conductive layer comprises the gate electrode;

the first target insulating layer comprises the second gate insulating layer; and

the second target conductive layer comprises the second electrode.

5. The display panel according to claim 1 , wherein

a thin film transistor with a top gate structure and a storage capacitor are further disposed in the display area on the base substrate;

the thin film transistor comprises an active layer, a first gate insulating layer, a gate electrode, a second gate insulating layer, a source-drain insulating layer and a source-drain pattern, which are sequentially arranged on the base substrate;

the storage capacitor comprises a first electrode, a capacitor insulating layer, and a second electrode, which are sequentially arranged on the base substrate;

the first target conductive layer comprises the gate electrode;

the first target insulating layer comprises the second gate insulating layer; and

the second target conductive layer comprises the second electrode.

6. The display panel according to claim 1 , wherein

the other wire segments comprise third wire segments and fourth wire segments, wherein the first wire segments and the third wire segments are alternately arranged one by one at an interval, and the fourth wire segments are overlapped on the first wire segments and the third wire segments that are adjacent.

7. The display panel according to claim 6 , wherein

the spacer comprises: a second insulating layer located on the third wire segments and covering the non-display area, the first wire segments are arranged on the second insulating layer;

the base substrate is further provided with a third insulating layer located on the first wire segments and covering the non-display area;

the second insulating layer and the third insulating layer are provided with second via holes running through the second insulating layer and the third insulating layer;

the second via holes are in communication with the first wire segments and the third wire segments that are adjacent; and

the fourth wire segments are arranged on the third insulating layer, and are overlapped on the third wire segments and the first wire segments through the second via holes, respectively.

8. The display panel according to claim 7 , wherein a third target conductive layer, a second target insulating layer, a fourth target conductive layer, a third target insulating layer and a fifth target conductive layer which are sequentially formed are further disposed in the display area on the base substrate,

the third wire segments are arranged in a same layer as the third target conductive layer, the second insulating layer is arranged in a same layer as the second target insulating layer, the first wire segments are arranged in a same layer as the fourth target conductive layer, the third insulating layer is arranged in a same layer as the second target insulating layer, and the fourth wire segments are arranged in a same layer as the fifth target conductive layer.

9. The display panel according to claim 8 , wherein a thin film transistor with a top gate structure and a storage capacitor are further disposed in a display area on the base substrate,

the thin film transistor comprises an active layer, a first gate insulating layer, a gate electrode, a second gate insulating layer, a source-drain insulating layer and a source-drain pattern, which are sequentially arranged on the base substrate;

the storage capacitor comprises a first electrode, a capacitor insulating layer and a second electrode, which are sequentially arranged on the base substrate;

the third target conductive layer comprises the gate electrode, the second target insulating layer comprises the second gate insulating layer, the fourth target conductive layer comprises the second electrode, the third target insulating layer comprises the source-drain insulating layer, and the fifth target conductive layer comprises the source-drain pattern.

10. A display device, comprising a display panel, wherein the display panel comprises:

a base substrate, and

a display area and a non-display area provided on the base substrate,

wherein a data line is provided in the display area and a detection line is provided in the non-display area; and the detection line is electrically connected to the data line and comprises a plurality of wire segments, and the plurality of wire segments overlap to form the detection line;

the entire detection line extends on a surface of the base substrate along an extension direction parallel to the surface of the base substrate, all of the plurality of wire segments extend along the extension direction and are sequentially arranged along the extension direction, two adjacent wire segments of the plurality of wire segments are respectively a previous segment and a next segment, the previous segment has a first end close to the next segment in the extension direction, the next segment has a first end close to the previous segment in the extension direction, the first end of the previous segment overlaps and directly contacts the first end of the next segment;

wherein the plurality of wire segments comprise first wire segments and other wire segments beside the first wire segments, and a spacer is disposed between the first wire segments and the base substrate;

wherein the other wire segments comprise second wire segments, and

the first wire segments are alternately arranged with the second wire segments, and are overlapped on the second wire segments, respectively;

one of the first wire segments and one of the second wire segments that are adjacent to each other constitute the two adjacent wire segments of the plurality of wire segments; and

wherein a first target conductive layer, a first target insulating layer and a second target conductive layer, which are sequentially formed, are further disposed in the display area on the base substrate;

the second wire segments are arranged in a same layer as the first target conductive layer;

the first insulating layer is arranged in a same layer as the first target insulating layer; and

the first wire segments are arranged in a same layer as the second target conductive layer.