IP Library › Granted Patent US 11,121,034
Granted Patent B2
US 11,121,034 · App. 16/472,082 · Granted Sep 14, 2021

Semiconductor device manufacturing method and semiconductor device

Inventor: Daisuke Tsunami (Tokyo, JP)
Assignee: Mitsubishi Electric Corporation
H01L21/76898H01L23/481
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Quick Facts
Patent No.
US 11,121,034
App. No.
16/472,082
Granted
Sep 14, 2021
Kind
B2
Abstract

There is provided a method of manufacturing a semiconductor device that is suitable for forming a one-step tapered groove even when a substrate material is a difficult-to-etch material. The method of manufacturing a semiconductor device includes a metal mask forming step, a dry etching step, and a metal mask removing step. The metal mask formation step forms a tapered metal mask having an opening on the back surface of the substrate. The opening exposes a part in the back surface, and an edge portion of the opening has a forward taper to the back surface. The dry etching step forms a tapered groove on the substrate by performing, from an upper side of the tapered metal mask, dry etching on the edge portion of the opening and the substrate exposed from the opening. The metal mask removing step removes the tapered metal mask.

Claims (32)

1. A method of manufacturing a semiconductor device comprising:

a metal mask forming step of forming a tapered metal mask having an opening on or above a back surface of a substrate, wherein the opening exposes a predetermined part in the back surface of the substrate, and an edge portion of the opening has a forward taper to the back surface;

a dry etching step of performing, from an upper side of the tapered metal mask, dry etching on the edge portion of the opening and the substrate exposed from the opening, thereby forming a tapered groove on the substrate; and

a metal mask removing step of removing the tapered metal mask, wherein

the metal mask forming step includes:

a power supply layer forming step of providing a power supply layer on the back surface of the substrate, wherein the power supply layer has a gap corresponding to the opening in the tapered metal mask; and

an electroless plating to form an electroless plating film on the power supply layer as the tapered metal mask using an electroless plating solution containing a catalyst poison so that a first concentration of the catalyst poison above an outer edge of the predetermined part in the back surface of the substrate is higher than a second concentration of the catalyst poison above a region outside the predetermined part in the back surface of the substrate whereby a portion of the electroless plating film above the outer edge of the predetermined part is grown to have the forward taper, and

a thickness of the region outside the predetermined part is determined by adjusting a width of the gap.

2. The method of manufacturing a semiconductor device according to claim 1 , wherein the catalyst poison includes a substance selected from the group consisting of:

at least one kind of metal ions selected from the group consisting of lead, bismuth, antimony,

tellurium and copper ions;

a sulfur compound;

a nitrogen compound;

polyethylene glycol; and

acetylenic-based alcohol.

3. The method of manufacturing a semiconductor device according to claim 2 , wherein the electroless plating solution contains 0.1 to 40 mg/L of the substance.

4. The method of manufacturing a semiconductor device according to claim 1 , further comprising:

a step of pasting a support substrate to a front surface side of the substrate with adhesive agent before the metal mask forming step; and

a step of exfoliating the support substrate from the substrate after the metal mask removing step.

5. The method of manufacturing a semiconductor device according to claim 1 , wherein a main component of the tapered metal mask is chromium, copper, nickel or aluminum.

6. A method of manufacturing a semiconductor device comprising:

a metal mask forming step of forming a tapered metal mask having an opening on or above a back surface of a substrate, wherein the opening exposes a predetermined part in the back surface of the substrate, and an edge portion of the opening has a forward taper to the back surface;

a dry etching step of performing, from an upper side of the tapered metal mask, dry etching on the edge portion of the opening and the substrate exposed from the opening, thereby forming a tapered groove on the substrate; and

a metal mask removing step of removing the tapered metal mask, wherein

the metal mask forming step includes an electroless plating to form an electroless plating film as the tapered metal mask using an electroless plating solution containing a catalyst poison so that a first concentration of the catalyst poison above an outer edge of the predetermined part in the back surface of the substrate is higher than a second concentration of the catalyst poison above a region outside the predetermined part in the back surface of the substrate whereby a portion of the electroless plating film above the outer edge of the predetermined part is grown to have the forward taper, and

the tapered metal mask is provided with a plurality of the openings adjacent to each other, and a first portion sandwiched by the plurality of openings in the tapered metal mask is formed to be thinner than a second portion other than the first portion in the tapered metal mask, and in the dry etching step, the dry etching is continued even after the first portion disappears through the plurality of openings, whereby a first region just under the first portion on the back surface is made thinner than a second region just under the second portion on the back surface.

7. The method of manufacturing a semiconductor device according to claim 1 , wherein a material of the substrate is a compound semiconductor or Al 2 O 3 .

8. The method of manufacturing a semiconductor device according to claim 1 , wherein a material of the substrate is a difficult-to-etch material having an etching rate of 0.1 to 1 μm/min in dry etching using a resist.

9. The method of manufacturing a semiconductor device according to claim 1 , wherein a material of the substrate is a single element semiconductor.

10. The method of manufacturing a semiconductor device according to claim 1 , wherein

the tapered metal mask is provided with a plurality of the openings adjacent to each other, and

a first portion sandwiched by the plurality of openings in the tapered metal mask is formed to be thinner than a second portion other than the first portion in the tapered metal mask.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2019
From: TSUNAMI, DAISUKE
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 049542/0462 →
Continuity (1)
Related Publication 20200098634A1 · Mar 26, 2020
Cited By (1)
US 12,469,785