Optoelectronic semiconductor chip based on a phosphide compound semiconductor material
An optoelectronic semiconductor chip including a semiconductor layer sequence containing a phosphide compound semiconductor material, wherein the semiconductor layer sequence includes a p-type semiconductor region, an n-type semiconductor region and an active layer disposed between the p-type semiconductor region and the n-type semiconductor region, a current spreading layer including a transparent conductive oxide adjoining the p-type semiconductor region, and a metallic p-connection layer at least regionally adjoining the current spreading layer, wherein the p-type semiconductor region includes a p-contact layer adjoining the current spreading layer, the p-contact layer contains GaP doped with C, a C dopant concentration in the p-contact layer is at least 5*10 19 cm −3 , and the p-contact layer is less than 100 nm thick.
1. An optoelectronic semiconductor chip comprising:
a semiconductor layer sequence comprising a phosphide compound semiconductor material, wherein the semiconductor layer sequence includes a p-type semiconductor region, an n-type semiconductor region and an active layer disposed between the p-type semiconductor region and the n-type semiconductor region,
a current spreading layer comprising a transparent conductive oxide adjoining the p-type semiconductor region, and
a metallic p-connection layer at least regionally adjoining the current spreading layer, wherein
the p-type semiconductor region comprises a p-contact layer adjoining the current spreading layer,
the p-contact layer comprises GaP doped with C,
a C dopant concentration in the p-contact layer is at least 1 * 10 20 cm −3 ,
the p-contact layer has a thickness of less than 35 nm,
an intermediate layer comprising GaP doped with C is arranged on a side of the p-contact layer remote from the current spreading layer, the intermediate layer having a lower dopant concentration than the p-contact layer, and
the active layer includes at least one layer comprising In x Ga y Al 1-x-y P with 0≤x≤1, 0≤y≤1 and x+y≤1.
2. The optoelectronic semiconductor chip according to claim 1 , wherein the p-contact layer has a thickness of 1 nm to 100 nm.
3. The optoelectronic semiconductor chip according to claim 1 , wherein the p-contact layer has a thickness of less than 50 nm.
4. The optoelectronic semiconductor chip according to claim 1 , wherein the current spreading layer and the p-contact layer are regionally interrupted.
5. The optoelectronic semiconductor chip according to claim 4 , wherein the optoelectronic semiconductor chip has an n-connection layer, and the current spreading layer and the p-contact layer are interrupted in a region opposite the n-connection layer.
6. The optoelectronic semiconductor chip according to claim 1 , wherein the p-contact layer has an rms surface roughness of less than 2 nm.
7. The optoelectronic semiconductor chip according to claim 1 , wherein a p-doped InA1GaP layer is arranged on a side of the p-contact layer remote from the current spreading layer.
8. The optoelectronic semiconductor chip according to claim 1 , wherein the current spreading layer comprises ITO, ZnO or IZO.
9. The optoelectronic semiconductor chip according to claim 1 , wherein the current spreading layer has a thickness of 10 nm to 300 nm.
10. The optoelectronic semiconductor chip according to claim 1 , wherein the n-type semiconductor region faces a radiation exit surface of the optoelectronic semiconductor chip, and the p-type semiconductor region faces a carrier substrate of the optoelectronic semiconductor chip.
11. The optoelectronic semiconductor chip according to claim 1 , wherein the p-connection layer comprises gold or silver.
12. The optoelectronic semiconductor chip according to claim 1 , wherein a superlattice comprising alternating first layers and second layers is arranged on a side of the p-contact layer remote from the current spreading layer.
13. The optoelectronic semiconductor chip according to claim 12 , wherein the superlattice is a periodic layer sequence comprising N periods, and the number of periods N of the superlattice is more than 3.
14. The optoelectronic semiconductor chip according to claim 12 , wherein the first layers and the second layers of the superlattice are 5 nm to 200 nm thick.
15. The optoelectronic semiconductor chip according to claim 1 , wherein a dielectric layer is arranged regionally between the current spreading layer and the p-connection layer, and the p-connection layer connects to the current spreading layer through one or more openings in the dielectric layer.
16. The optoelectronic semiconductor chip according to claim 1 , wherein the intermediate layer has a dopant concentration of more than 1 * 10 19 cm −3 .
17. The optoelectronic semiconductor chip according to claim 1 , wherein the intermediate layer is 10 nm to 200 nm thick.
18. The optoelectronic semiconductor chip according to claim 1 , wherein the p-contact layer has an rms surface roughness of less than 2 nm, and
wherein a p-doped InAlGaP layer is arranged on a side of the p-contact layer remote from the current spreading layer.