Schottky semiconductor device with junction termination extensions

1. A semiconductor device, comprising:

a single-crystal silicon carbide substrate of a first conductivity type;

a drift layer of the first conductivity type, the drift layer being formed of a silicon carbide film on one surface of the single-crystal silicon carbide substrate;

one electrode that is Schottky-connected to the drift layer;

a first junction termination extension (JTE) region that is formed around an active portion where the drift layer and the one electrode are Schottky-connected;

a second JTE region that is formed around the first JTE region;

a third JTE region that is formed around the second JTE region; and

another electrode that is disposed on another surface of the single-crystal silicon carbide substrate, wherein

the first JTE region, the second JTE region, and the third JTE region are doped with an impurity of a second conductivity type different from the first conductivity type;

the second JTE region is disposed next to the first JTE region, and the third JTE region is disposed next to the second JTE region;

a concentration ratio R 21 represented by (concentration of the impurity in the second JTE region)/(concentration of the impurity in the first JTE region) and a concentration ratio R 32 represented by (concentration of the impurity in the third JTE region)/(concentration of the impurity in the second JTE region) are greater than or equal to 0.50 and less than or equal to 0.65; and

a width W 1 of the first JTE region, a width W 2 of the second JTE region, and a width W 3 of the third JTE region are greater than or equal to 130 μm and less than or equal to 190 μm.

2. The semiconductor device as claimed in claim 1 , wherein a thickness of the drift layer is greater than or equal to 142.5 μm and less than or equal to 157.5 μm.

3. The semiconductor device as claimed in claim 1 , wherein the drift layer is doped with an impurity at a concentration greater than or equal to 4.0×10 14 cm −3 and less than or equal to 6.0×10 14 cm −3 .

4. The semiconductor device as claimed in claim 2 , wherein the drift layer is doped with an impurity at a concentration greater than or equal to 4.0×10 14 cm −3 and less than or equal to 6.0×10 14 cm −3 .

5. The semiconductor device as claimed in claim 1 , further comprising:

a channel stopper region of the first conductivity type, the channel stopper region being formed around the third JTE region in the drift layer,

wherein the channel stopper region is doped with an impurity that is different from an impurity with which the drift layer is doped.

6. The semiconductor device as claimed in claim 2 , further comprising:

a channel stopper region of the first conductivity type, the channel stopper region being formed around the third JTE region in the drift layer,

wherein the channel stopper region is doped with art impurity that is different from an impurity with which the drift layer is doped.

7. The semiconductor device as claimed in claim 3 , further comprising:

a channel stopper region of the first conductivity type, the channel stopper region being formed around the third JTE region in the drift layer,

wherein the channel stopper region is doped with an impurity that is different from an impurity with which the drift layer is doped.

8. The semiconductor device as claimed in claim 4 , further comprising:

a channel stopper region of the first conductivity type, the channel stopper region being formed around the third JTE region in the drift layer,

wherein the channel stopper region is doped with an impurity that is different from an impurity with which the drift layer is doped.