IP Library Granted Patent US 10,892,203
Granted Patent B2
US 10,892,203 · App. 16/483,970 · Granted Jan 12, 2021

Power semiconductor module

Inventor: Satoshi Yanaura (Chiyoda-ku, JP)
Assignee: MITSUBISHI ELECTRIC CORPORATION
H01L23/296H01L23/053H01L25/18H01L29/0619H01L23/49
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,892,203
App. No.
16/483,970
Granted
Jan 12, 2021
Kind
B2
Abstract

Provided is a power semiconductor module including: a metal base plate; an insulating substrate arranged on the metal base plate and provided with an electrode; a semiconductor element arranged on the insulating substrate; a case arranged on the metal base plate so as to surround the insulating substrate and the semiconductor element; and a potting material filled into a space defined by the metal base plate and the case so as to encapsulate the insulating substrate and the semiconductor element. The potting material includes: a silicone gel; and a conductivity-imparting agent that is added to the gel and contains a silicon atom and an ionic group.

Claims (17)

1. A power semiconductor module, comprising:

a metal base plate;

an insulating substrate arranged on the metal base plate and provided with an electrode;

a semiconductor element arranged on the insulating substrate;

a case arranged on the metal base plate so as to surround the insulating substrate and the semiconductor element; and

a potting material filled into a space defined by the metal base plate and the case so as to seal the insulating substrate and the semiconductor element,

the potting material including:

a silicone gel; and

a conductivity-imparting agent added to the silicone gel and including a silicon atom and an ionic group,

wherein an amount of leakage current generated at a comb-electrode boundary of an evaluation structure sealed with the potting material which is used within the power semiconductor module is 1.5×10 −8 A or less and 4.2×10 −10 A or more,

wherein the evaluation structure has a silicon nitride substrate, a first comb-electrode formed on the silicon nitride substrate, and a second comb-electrode formed on the silicon nitride substrate so as to oppose to the first comb-electrode,

wherein the first comb-electrode has a plurality of first linear electrodes, a number of the plurality of first linear electrodes is 10, and each of the plurality of first linear electrodes has a length of 18 mm,

wherein the second comb-electrode has a plurality of second linear electrodes, a number of the plurality of second linear electrodes is 9, and each of the plurality of second linear electrodes has a length of 18 mm,

wherein the plurality of first linear electrodes and the plurality of second linear electrodes are arranged alternately at an interval of 1 mm, and

wherein the amount of leakage current is measured after 300 seconds from application of a DC voltage of 1 kV between the first comb-electrode and the second comb-electrode.

2. The power semiconductor module according to claim 1 , wherein the potting material is in contact with a guard ring provided at an outer peripheral portion of surface of the semiconductor element.

3. The power semiconductor module according to claim 1 , wherein the ionic group comprises bis(trifluoromethane sulfone)imide.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 6, 2019
From: YANAURA, SATOSHI
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 049977/0686 →
Priority Claims (1)
JP 2017-064797 · Mar 29, 2017 · national
Continuity (1)
Related Publication 20200091024A1 · Mar 19, 2020