Sensor chip and electronic apparatus

1. A sensor chip, comprising:

a plurality of pixel regions;

a semiconductor substrate that includes an avalanche multiplication region configured to multiply carriers generated through photoelectric conversion of a light incident on the semiconductor substrate, wherein

the avalanche multiplication region is in each pixel region of the plurality of pixel regions;

a plurality of on-chip lenses on a first surface side of the semiconductor substrate, wherein

the plurality of on-chip lenses includes a first on-chip lens, a second on-chip lens, and a third on-chip lens in a pixel region of the plurality of pixel regions, and

each of the first on-chip lens, the second on-chip lens, and the third on-chip lens of the plurality of on-chip lenses is configured to condense the light incident on the semiconductor substrate; and

a wiring layer on a second surface side of the semiconductor substrate opposite to the first surface side, wherein

the wiring layer comprises a plurality of light-reflecting wirings including a first light-reflecting wiring, a second light-reflecting wiring, and a third light-reflecting wiring,

the second on-chip lens is at a central portion of each pixel region of the plurality of pixel regions,

the second light-reflecting wiring is at a position that corresponds to the second on-chip lens, and

the second light-reflecting wiring has a wider area than each of the first light-reflecting wiring and the third light-reflecting wiring.

2. The sensor chip according to claim 1 ,

wherein the sensor chip is of a back-illuminated type in which a back surface of the semiconductor substrate is illuminated with the light.

3. The sensor chip according to claim 1 , wherein the semiconductor substrate comprises silicon.

4. The sensor chip according to claim 1 , wherein the semiconductor substrate is configured to detect an infrared light.

5. The sensor chip according to claim 1 , wherein when the semiconductor substrate is viewed in plan, a number of on-chip lenses of the plurality of on-chip lenses in a longitudinal direction is equal to a number of on-chip lenses of the plurality of on-chip lenses in a transverse direction.

6. The sensor chip according to claim 1 , wherein each on-chip lens of the plurality of on-chip lenses has a same size.

7. The sensor chip according to claim 1 , further comprising an inner lens between the semiconductor substrate and the plurality of on-chip lenses,

wherein the inner lens is configured to condense, on a center of the pixel region, the light condensed by the plurality of on-chip lenses.

8. The sensor chip according to claim 1 , further comprising a band-pass filter between the semiconductor substrate and the plurality of on-chip lenses,

wherein the band-pass filter is configured to allow only light in a specific wavelength range to pass therethrough.

9. The sensor chip according to claim 1 , further comprising a light shielding film on a light illumination surface of the semiconductor substrate,

wherein the light shielding film surrounds the plurality of on-chip lenses in the pixel region.

10. The sensor chip according to claim 1 , further comprising an inter-lens partition on a light illumination surface of the semiconductor substrate,

wherein the inter-lens partition separates adjacent on-chip lenses of the plurality of on-chip lenses from each other.

11. The sensor chip according to claim 1 , further comprising:

a trench in the semiconductor substrate,

wherein the trench surrounds each pixel region of the plurality of pixel regions; and

an insulating film embedded in the trench.

12. The sensor chip according to claim 1 , further comprising:

a trench in the semiconductor substrate,

wherein the trench surrounds each pixel region of the plurality of pixel regions; and

a metal film embedded in the trench.

13. An electronic apparatus, comprising:

a sensor chip that includes:

a plurality of pixel regions;

a semiconductor substrate that includes an avalanche multiplication region configured to multiply carriers generated through photoelectric conversion of a light incident on the semiconductor substrate, wherein

the avalanche multiplication region is in each pixel region of the plurality of pixel regions;

a plurality of on-chip lenses on a first surface side of the semiconductor substrate, wherein

the plurality of on-chip lenses includes a first on-chip lens, a second on-chip lens, and a third on-chip lens in each pixel region of the plurality of pixel regions, and

each of the first on-chip lens, the second on-chip lens, and the third on-chip lens of the plurality of on-chip lenses is configured to condense the light incident on the semiconductor substrate; and

a wiring layer on a second surface side of the semiconductor substrate opposite to the first surface side, wherein

the wiring layer comprises a plurality of light-reflecting wirings including a first light-reflecting wiring, a second light-reflecting wiring, and a third light-reflecting wiring,

the second on-chip lens is at a central portion of each pixel region of the plurality of pixel regions,

the second light-reflecting wiring is at a position that corresponds to the second on-chip lens, and

the second light-reflecting wiring has a wider area than each of the first light-reflecting wiring and the third light-reflecting wiring.

14. The sensor chip according to claim 1 , wherein

the first light-reflecting wiring is at a position that corresponds to the first on-chip lens, and

the third light-reflecting wiring is at a position that corresponds to the third on-chip lens.

15. The sensor chip according to claim 1 , wherein the avalanche multiplication region is in a specific portion that corresponds to the central portion of each pixel region of the plurality of pixel regions.