IP Library › Granted Patent US 11,227,071
Granted Patent B2
US 11,227,071 · App. 16/491,059 · Granted Jan 18, 2022

Hardware security to countermeasure side-channel attacks

Inventors: Kwen Siong Chong (Singapore, SG); Bah Hwee Gwee (Singapore, SG); Ali Akbar Pammu (Singapore, SG)
Assignee: Nanyang Technological University
G06F21/72G06F21/55G06F21/6218G06F21/75
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,227,071
App. No.
16/491,059
Granted
Jan 18, 2022
Kind
B2
Abstract

A method and an apparatus for hardware security to countermeasure side-channel attacks are provided. The method or apparatus may introduce at least one redundant or partial redundant computation having a similar power dissipation profile or an electromagnetic emission profile when compared to that of a genuine operation for cryptographic devices, and/or to reorder the iterations of operations in a different sequence. The redundant or partial redundant computation may be performed by using a different password key and/or a different raw data (e.g., plaintext). The presence of the redundant or partial redundant computation would make side-channel attacks difficult in the sense that genuine or redundant/partial redundant operations are difficult to be clearly identified, hence serving as a countermeasure for hardware security.

Claims (40)

1. An apparatus for encrypting at least one plaintext to at least one cipher-text using at least one password key, the apparatus comprising:

at least one memory; and

at least one processor coupled to the at least one memory and configured to:

perform at least one genuine computation that is dependent on the at least one plaintext and the at least one password key; and

perform at least one redundant computation that is independent of the at least one plaintext or the at least one password key,

wherein the apparatus emits first analog electrical characteristics when the at least one genuine computation is performed and emits second analog electrical characteristics when the at least one redundant computation is performed, wherein the at least one genuine computation is performed based on at least one of a first input and a first key, the first input derived from the at least one plaintext and the first key derived from the at least one password key, wherein the at least one redundant computation is performed based on at least one of a second input or a second key, and wherein the second input has a same signal property as the first input and/or the second key has a same signal property as the first key so that a metric of similarity between the first analog electrical characteristics and the second analog electrical characteristics satisfies a threshold.

2. The apparatus of claim 1 , wherein the first analog electrical characteristics or the second analog electrical characteristics comprise at least one of power dissipation or electromagnetic emission.

3. The apparatus of claim 1 , wherein the at least one genuine computation comprises at least one round of genuine computation, wherein the at least one redundant computation comprises at least one round of computational imitation, wherein a sequence of computations for the at least one round of genuine computation and the at least one round of computational imitation is random, wherein the at least one round of genuine computation collectively generates the at least one cipher-text.

4. The apparatus of claim 1 , wherein at least one round of computation is performed to encrypt the at least one plaintext, wherein the at least one round of computation comprises at least two partial computations, wherein each partial computation comprises a portion of the at least one genuine computation and a portion of the at least one redundant computation, wherein the at least two partial computations collectively generate the at least one cipher-text.

5. The apparatus of claim 4 , wherein analog electrical characteristics emitted by the apparatus for each partial computation of the at least two partial computations are similar, wherein analog electrical characteristics emitted by the apparatus when a partial computation of the at least two partial computations is performed are similar to analog electrical characteristics emitted by the apparatus when the at least one round of computation is performed.

6. The apparatus of claim 1 , wherein at least one round of computation is performed to encrypt the at least one plaintext, wherein the at least one round of computation comprises at least one iteration of genuine substitution-box computation and at least one iteration of substitution-box computational imitation, wherein the at least one genuine computation comprises the at least one iteration of genuine substitution-box computation, wherein the at least one redundant computation comprises the at least one iteration of substitution-box computational imitation, wherein a sequence of computations for the at least one iteration of genuine substitution-box computation and the at least one iteration of substitution-box computational imitation is random, wherein the at least one iteration of genuine substitution-box computation collectively generates the at least one cipher-text.

7. The apparatus of claim 1 , wherein the first input has the same Hamming weight as the second input.

8. The apparatus of claim 1 , wherein the first key has the same Hamming weight as the second key.

9. The apparatus of claim 1 , wherein the metric is one of Normalized Absolute Difference, correlation coefficient, or correlation coefficient of variance, wherein the metric is derived from key leakage regions of the first analog electrical characteristics and the second analog electrical characteristics.

10. An apparatus for decrypting at least one cipher-text to at least one plaintext using at least one password key, the apparatus comprising:

at least one memory; and

at least one processor coupled to the at least one memory and configured to:

perform at least one genuine computation that is dependent on the at least one cipher-text and the at least one password key; and

perform at least one redundant computation that is independent of the at least cipher-text or the at least one password key;

wherein the apparatus emits first analog electrical characteristics when the at least one genuine computation is performed and emits second analog electrical characteristics when the at least one redundant computation is performed, wherein the at least one genuine computation is performed based on at least one of a first input and a first key, the first input derived from the at least one cipher-text and the first key derived from the at least one password key, wherein the at least one redundant computation is performed based on at least one of a second input or a second key, and wherein the second input has a same signal property as the first input and/or the second key has a same signal property as the first key so that a metric of similarity between the first analog electrical characteristics and the second analog electrical characteristics satisfies a threshold.

11. The apparatus of claim 10 , wherein the first analog electrical characteristics or the second analog electrical characteristics comprise at least one of power dissipation or electromagnetic emission.

12. The apparatus of claim 10 , wherein the at least one genuine computation comprises at least one round of genuine computation, wherein the at least one redundant computation comprises at least one round of computational imitation, wherein a sequence of computations for the at least one round of genuine computation and the at least one round of computational imitation is random, wherein the at least one round of genuine computation collectively generates the at least one plaintext.

13. The apparatus of claim 10 , wherein at least one round of computation is performed to decrypt the at least one cipher-text, wherein the at least one round of computation comprises at least two partial computations, wherein each partial computation comprises a portion of the at least one genuine computation and a portion of the at least one redundant computation, wherein the at least two partial computations collectively generate the at least one plaintext.

14. The apparatus of claim 13 , wherein analog electrical characteristics emitted by the apparatus for each partial computation of the at least two partial computations are similar, wherein analog electrical characteristics emitted by the apparatus when a partial computation of the at least two partial computations is performed are similar to analog electrical characteristics emitted by the apparatus when the at least one round of computation is performed.

15. The apparatus of claim 10 , wherein at least one round of computation is performed to decrypt the at least one cipher-text, wherein the at least one round of computation comprises at least one iteration of genuine inverse substitution-box computation and at least one iteration of inverse substitution-box computational imitation, wherein the at least one genuine computation comprises the at least one iteration of genuine inverse substitution-box computation, wherein the at least one redundant computation comprises the at least one iteration of inverse substitution-box computational imitation, wherein a sequence of computations for the at least one iteration of genuine inverse substitution-box computation and the at least one iteration of inverse substitution-box computational imitation is random, wherein the at least one iteration of genuine inverse substitution-box computation collectively generates the at least one plaintext.

16. The apparatus of claim 10 , wherein the first input has the same Hamming weight as the second input.

17. The apparatus of claim 10 , wherein the first key has the same Hamming weight as the second key.

18. The apparatus of claim 10 , wherein the metric is one of Normalized Absolute Difference, correlation coefficient, or correlation coefficient of variance, wherein the metric is derived from key leakage regions of the first analog electrical characteristics and the second analog electrical characteristics.

19. A method of encrypting at least one plaintext to at least one cipher-text using at least one password key, the method comprising:

performing, by a computing device, at least one genuine computation that is dependent on the at least one plaintext and the at least one password key;

emitting, by the computing device, first analog electrical characteristics in response to the performing of the at least one genuine computation;

performing, by the computing device, at least one redundant computation that is independent of the at least one plaintext or the at least one password key; and

emitting, by the computing device, second analog electrical characteristics in response to the performing of the at least one redundant computation,

wherein the at least one genuine computation is performed based on at least one of a first input and a first key, the first input derived from the at least one plaintext and the first key derived from the at least one password key, wherein the at least one redundant computation is performed based on at least one of a second input or a second key, and wherein the second input has a same signal property as the first input and/or the second key has a same signal property as the first key so that a metric of similarity between the first analog electrical characteristics and the second analog electrical characteristics satisfies a threshold.

20. A method of decrypting at least one cipher-text to at least one plaintext using at least one password key, the method comprising:

performing, by a computing device, at least one genuine computation that is dependent on the at least one cipher-text and the at least one password key;

emitting, by the computing device, first analog electrical characteristics in response to the performing of the at least one genuine computation;

performing, by the computing device, at least one redundant computation that is independent of the at least one cipher-text or the at least one password key; and

emitting, by the computing device, second analog electrical characteristics in response to the performing of the at least one redundant computation,

wherein the at least one genuine computation is performed based on at least one of a first input and a first key, the first input derived from the at least one cipher-text and the first key derived from the at least one password key, wherein the at least one redundant computation is performed based on at least one of a second input or a second key, and wherein the second input has a same signal property as the first input and/or the second key has a same signal property as the first key so that a metric of similarity between the first analog electrical characteristics and the second analog electrical characteristics satisfies a threshold.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2019
From: CHONG, KWEN SIONG; GWEE, BAH HWEE; PAMMU, ALI AKBAR
To: NANYANG TECHNOLOGICAL UNIVERSITY
Reel/Frame 050266/0105 →
Priority Claims (1)
SG 10201702226R · Mar 20, 2017 · national
Continuity (1)
Related Publication 20200004992A1 · Jan 2, 2020