Nonvolatile memory device having multi-level resistance and capacitance characteristics, and manufacturing method thereof
View Patent ↗A nonvolatile memory device having multi-level resistance and capacitance values is provided. Such a nonvolatile memory device includes: a substrate; a first electrode that is provided on the substrate; a dielectric layer that is provided on the first electrode, has resistance and capacitance changed by a tunneling conduction phenomenon of charges according to an applied voltage, has rectifying characteristics, and includes a dielectric material; an active layer that is provided on the dielectric layer, has resistance and capacitance changed according to an applied voltage, and includes a graphene oxide complex; and a second electrode that is provided on the active layer. In addition, the nonvolatile memory device has multi-level resistance and capacitance values according to an applied voltage.
1. A nonvolatile memory device comprising:
a substrate;
a first electrode disposed on the substrate;
a dielectric layer disposed on the first electrode, wherein the dielectric layer has resistance and capacitance changed by a tunneling conduction phenomenon of charges according to an applied voltage, has rectifying characteristics, and includes a dielectric material;
an active layer disposed on the dielectric layer, wherein the active layer has resistance and capacitance changed according to the applied voltage, and includes a graphene oxide complex; and
a second electrode disposed on the active layer,
wherein the nonvolatile memory device has multi-level resistance and capacitance values according to the applied voltage,
wherein the graphene oxide complex includes a graphene oxide layer, and a metal oxide layer disposed on the graphene oxide layer,
wherein the metal oxide layer is a layer composed of iron oxide nanoparticles,
wherein the iron oxide nanoparticles have γ-Fe2O3 and Fe3O4 particles, and
wherein metal oxide of the metal oxide layer is an oxide semiconductor material.
2. The nonvolatile memory device according to claim 1 , wherein the dielectric layer includes Si 3 N 4 , SiO 2 , SiO x N y , AlN or Al 2 O 3 .
3. The nonvolatile memory device according to claim 1 , wherein the active layer is formed on the dielectric layer by performing a solution process.
4. A method for manufacturing a nonvolatile memory device, the method comprising:
forming a first electrode on a substrate;
forming, on the first electrode, a dielectric layer that has resistance and capacitance changed by a tunneling conduction phenomenon of charges according to an applied voltage, has rectifying characteristics, and includes a dielectric material;
forming, on the dielectric layer, an active layer that has resistance and capacitance changed according to the applied voltage and includes a graphene oxide complex; and
forming a second electrode on the active layer,
wherein the nonvolatile memory device has multi-level resistance and capacitance values according to the applied voltage,
wherein the graphene oxide complex includes a graphene oxide layer, and a metal oxide layer disposed on the graphene oxide layer,
wherein the metal oxide layer is a layer composed of iron oxide nanoparticles,
wherein the iron oxide nanoparticles have γ-Fe2O3 and Fe3O4 particles, and
wherein metal oxide of the metal oxide layer is an oxide semiconductor material.
5. The method for manufacturing the nonvolatile memory device according to claim 4 , wherein the forming the active layer includes applying a solution including graphene oxide and the metal oxide onto the dielectric layer.