InGaN-based resonant cavity enhanced detector chip based on porous DBR
An InGaN-based resonant cavity enhanced detector chip based on porous DBR, including: a substrate ( 10 ); a buffer layer ( 11 ) formed on the substrate ( 10 ); a bottom porous DBR layer ( 12 ) formed on the buffer layer ( 11 ); an n-type GaN layer ( 13 ) formed on the bottom porous DBR layer ( 12 ), wherein one side of the n-type GaN layer ( 13 ) is recessed downward to form a mesa ( 13 ′), and the other side of the n-type GaN layer ( 13 ) is protruded; an active region ( 14 ) formed on the n-type GaN layer ( 13 ); a p-type GaN layer ( 15 ) formed on the active region ( 14 ); a sidewall passivation layer ( 20 ) formed on an upper surface of the p-type GaN layer ( 15 ) and sidewalls of the protruded n-type GaN layer ( 13 ), the active region ( 14 ), and the p-type GaN layer ( 15 ), wherein the sidewall passivation layer ( 20 ) on the upper surface of the p-type GaN layer ( 15 ) has a window in a middle; a transparent conductive layer ( 16 ) formed on the sidewall passivation layer ( 20 ) and the p-type GaN layer ( 15 ) at the window; an n-type electrode ( 18 ) formed on the mesa of the n-type GaN layer ( 13 ); a p-type electrode ( 19 ) formed on a periphery of an upper surface of the sidewall passivation layer ( 20 ); a top dielectric DBR layer ( 17 ) formed on the transparent conductive layer ( 16 ) and the p-type electrode ( 19 ).
1. An InGaN-based resonant cavity enhanced detector chip based on porous DBR, comprising:
a substrate;
a buffer layer formed on an upper surface of the substrate;
a bottom porous DBR layer formed on an upper surface of the buffer layer;
an n-type GaN layer formed on an upper surface of the bottom porous DBR layer, wherein one side of the n-type GaN layer is recessed downward to form a mesa having a depth smaller than a thickness of the n-type GaN layer, and the other side of the n-type GaN layer is protruded;
an active region formed on an upper surface of the n-type GaN layer;
a p-type GaN layer formed on an upper surface of the active region;
a sidewall passivation layer made of an insulating medium and formed on an upper surface of the p-type GaN layer and sidewalls of the protruded n-type GaN layer, the active region, and the p-type GaN layer, wherein the sidewall passivation layer is further formed to cover a portion of a surface of the n-type mesa, wherein the sidewall passivation layer on the upper surface of the p-type GaN layer has a window in a middle;
a transparent conductive layer formed on a portion of upper surfaces of the sidewall passivation layer and the p-type GaN layer at the window;
an n-type electrode formed on the mesa of the n-type GaN layer;
a p-type electrode formed on a periphery of an upper surface of the sidewall passivation layer and covering a portion of the transparent conductive layer; and
a top dielectric DBR layer formed on upper surfaces of the transparent conductive layer and the p-type electrode.
2. The InGaN-based resonant cavity enhanced detector chip of claim 1 , wherein the top dielectric DBR layer and the bottom porous DBR layer constitute upper and lower mirrors of a resonant cavity respectively, and the bottom porous DBR layer has a reflectivity more than 95% at a peak emission wavelength of the active region, which is higher than the reflectivity of the top dielectric DBR layer.
3. The InGaN-based resonant cavity enhanced detector chip of claim 1 , wherein the bottom porous DBR layer is a nitride DBR formed by stacking porous layers and non-porous layers alternately, and comprises n-type heavily doped layers and unintentionally doped layers made of GaN, AlGaN, InGaN or AlInGaN or a combination thereof.
4. The InGaN-based resonant cavity enhanced detector chip of claim 1 , wherein the top dielectric DBR layer is a multi-periodic DBR structure formed by stacking oxides having different refractive indices alternately and has a material of SiO 2 /TiO 2 , SiO 2 /Ta 2 O 5 , ZrO 2 /SiO 2 , SiO 2 /Al 2 O 3 or TiO 2 /Al 2 O 3 .
5. The InGaN-based resonant cavity enhanced detector chip of claim 1 , wherein the substrate of the chip is made of sapphire, Si or SiC; the buffer layer comprises a low-temperature GaN nucleation layer and an unintentionally doped GaN layer that are sequentially grown, and the nucleation layer is made of AlN, ZnO or graphene.
6. The InGaN-based resonant cavity enhanced detector chip of claim 1 , wherein the active region is a GaN-based multiple quantum well structure under the visible band; and the transparent conductive layer is made of ITO, graphene, ZnO thin film, transparent metal electrode material, or a composite film material composed of above materials.
7. The InGaN-based resonant cavity enhanced detector chip of claim 1 , wherein the sidewall passivation layer is made of SiO 2 , Si 3 N 4 , HfO 2 or Al 2 O 3 .
8. The InGaN-based resonant cavity enhanced detector chip of claim 1 , wherein an n-type GaN layer is further grown between the bottom porous DBR layer and the buffer layer, and is used as a current spreading layer applied for electrochemical etching to form a porous DBR.
9. The InGaN-based resonant cavity enhanced detector chip of claim 6 , wherein the visible band is blue light, green light, yellow light, or purple light.