FORMING A COMBINATION OF LONG CHANNEL DEVICES AND VERTICAL TRANSPORT FIN FIELD EFFECT TRANSISTORS ON THE SAME SUBSTRATE
A method of forming a vertical transport fin field effect transistor and a long-channel field effect transistor on the same substrate, including, forming a recessed region in a substrate and a fin region adjacent to the recessed region, forming one or more vertical fins on the fin region, forming a long-channel pillar from the substrate in the recessed region, where the long-channel pillar is at a different elevation than the one or more vertical fins, forming two or more long-channel source/drain plugs on the long-channel pillar, forming a bottom source/drain plug in the fin region, where the bottom source/drain plug is below the one or more vertical fins, forming a gate structure on the long-channel pillar and a gate structure on the one or more vertical fins, and forming a top source/drain on the top surface of the one or more vertical fins.
1 . A vertical transport fin field effect transistor and a long-channel field effect transistor, comprising:
one or more vertical fins on a first region of a substrate, wherein the one or more vertical fins extend away from the substrate;
a top source/drain on the top surface of each of the one or more vertical fins;
a long-channel pillar on a second region of the substrate adjacent to the first region;
a pillar gate structure on the long-channel pillar; and
two long-channel source/drains on the long-channel pillar, wherein a first long-channel source/drain is on an opposite side of the long-channel pillar from a second long-channel source/drain.
2 . The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 1 , wherein the pillar gate structure on the long-channel pillar has an inverted “T” shape directly above a central section of the long-channel pillar.
3 . The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 1 , wherein the pillar gate structure on the long-channel pillar includes a gate dielectric layer and a conductive gate electrode.
4 . The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 1 , wherein the top source/drains are silicon-germanium (SiGe) with a germanium concentration in the range of about 40 at. % Ge to about 80 at. % Ge.
5 . The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 1 , wherein the long-channel pillar has a length in the range of about 100 nm to about 600 nm.
6 . The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 1 , further comprising electrical contacts to each of the long-channel source/drain, each of the top source/drains, and the pillar gate structure.
7 . The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 1 , further comprising a dielectric fill layer that covers the long-channel pillar but not the one or more vertical fins.
8 . The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 7 , further comprising a bottom spacer layer on the dielectric fill layer, and an interlayer dielectric (ILD) layer on the bottom spacer layer.
9 . The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 8 , further comprising a gate dielectric layer on the long-channel pillar and the one or more vertical fins.
10 . A vertical transport fin field effect transistor and a long-channel field effect transistor on a substrate, comprising:
one or more vertical fins on a vertical fin block on the substrate;
a long-channel pillar on the substrate adjacent to the vertical fin block, wherein the long-channel pillar is at a lower elevation than the one or more vertical fins;
two or more long-channel source/drains on the long-channel pillar; and
a pillar gate structure on the long-channel pillar.
11 . The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 10 , further comprising a bottom source/drain in the vertical fin block below the one or more vertical fins.
12 . The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 11 , wherein the bottom source/drain in the vertical fin block has the same thickness as the two or more long-channel source/drains on the long-channel pillar.
13 . The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 10 , further comprising a top source/drain on each of the one or more vertical fins.
14 . The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 10 , wherein the long-channel pillar has a length in the range of about 100 nm to about 600 nm.
15 . A vertical transport fin field effect transistor and a long-channel field effect transistor on the same substrate, comprising:
one or more vertical fins on a fin region of a substrate, wherein the one or more vertical fins extend away from the substrate;
a long-channel pillar on a recessed region of the substrate, where the recessed region is adjacent to the fin region, and the long-channel pillar is at a different elevation than the one or more vertical fins;
two or more long-channel source/drains on the long-channel pillar; and
a gate dielectric layer on the long-channel pillar and the one or more vertical fins.
16 . The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 15 , wherein the gate dielectric layer has an inverted “T” shape directly above a central section of the long-channel pillar.
17 . The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 16 , further comprising a conductive gate electrode on the gate dielectric layer.
18 . The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 16 , further comprising a top source/drain on the top surface of each of the one or more vertical fins, wherein the top source/drains are each silicon-germanium (SiGe) with a germanium concentration in the range of about 40 at. % Ge to about 80 at. % Ge.
19 . The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 16 , wherein the long-channel pillar has a length in the range of about 100 nm to about 600 nm.
20 . The vertical transport fin field effect transistor and a long-channel field effect transistor of claim 16 , further comprising electrical contacts to each of the two or more long-channel source/drains, and the top source/drain on each of the one or more vertical fins.