IP Library › Granted Patent US 11,170,834
Granted Patent B2
US 11,170,834 · App. 16/507,826 · Granted Nov 9, 2021

Memory cells and methods of forming a capacitor including current leakage paths having different total resistances

Inventors: Michael Mutch (Meridian, ID); Ashonita A. Chavan (Boise, ID); Sameer Chhajed (Boise, ID); Beth R. Cook (Boise, ID); Kamal Kumar Muthukrishnan (Boise, ID); Durai Vishak Nirmal Ramaswamy (Boise, ID); Lance Williamson (Boise, ID)
Assignee: Micron Technology, Inc.
G11C11/221H01L27/11502H01L28/60
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Quick Facts
Patent No.
US 11,170,834
App. No.
16/507,826
Granted
Nov 9, 2021
Kind
B2
Abstract

A memory cell comprises a capacitor comprising a first capacitor electrode having laterally-spaced walls, a second capacitor electrode comprising a portion above the first capacitor electrode, and capacitor insulator material between the second capacitor electrode and the first capacitor electrode. The capacitor comprises an intrinsic current leakage path from one of the first and second capacitor electrodes to the other through the capacitor insulator material. A parallel current leakage path is between the second capacitor electrode and the first capacitor electrode. The parallel current leakage path is circuit-parallel with the intrinsic current leakage path, of lower total resistance than the intrinsic current leakage path, and comprises leaker material that is everywhere laterally-outward of laterally-innermost surfaces of the laterally-spaced walls of the first capacitor electrode. Other embodiments, including methods, are disclosed.

Claims (88)

1. A memory cell, comprising:

a capacitor comprising:

a first capacitor electrode having laterally-spaced walls;

a second capacitor electrode comprising a portion above the first capacitor electrode; and

capacitor insulator material between the second capacitor electrode and the first capacitor electrode, the capacitor comprising an intrinsic current leakage path from one of the first and second capacitor electrodes to the other through the capacitor insulator material; and

a parallel current leakage path between the second capacitor electrode and the first capacitor electrode; the parallel current leakage path being circuit-parallel with the intrinsic current leakage path and being of lower total resistance than the intrinsic current leakage path, the parallel current leakage path being leaker material that is everywhere laterally-outward of laterally-innermost surfaces of the laterally-spaced walls of the first capacitor electrode and is nowhere laterally-inward of the laterally-innermost surfaces of the laterally-spaced walls of the first capacitor electrode.

2. The memory cell of claim 1 wherein the leaker material comprises an annulus.

3. The memory cell of claim 1 wherein the capacitor insulator material is ferroelectric.

4. A memory cell, comprising:

a capacitor comprising:

a first capacitor electrode having laterally-spaced walls;

a second capacitor electrode comprising a portion above the first capacitor electrode; and

capacitor insulator material between the second capacitor electrode and the first capacitor electrode, the capacitor comprising an intrinsic current leakage path from one of the first and second capacitor electrodes to the other through the capacitor insulator material;

a parallel current leakage path between the second capacitor electrode and the first capacitor electrode; the parallel current leakage path being circuit-parallel with the intrinsic current leakage path, of lower total resistance than the intrinsic current leakage path, and comprising leaker material that is everywhere laterally-outward of laterally-innermost surfaces of the laterally-spaced walls of the first capacitor electrode; and

wherein the capacitor insulator material comprises laterally-spaced walls in a capacitor opening that are laterally thicker in the capacitor opening above the laterally-spaced walls of the first capacitor electrode than laterally-aside the laterally-spaced walls of the first capacitor electrode in the capacitor opening.

5. A memory cell, comprising:

a capacitor comprising:

a first capacitor electrode having laterally-spaced walls;

a second capacitor electrode comprising a portion above the first capacitor electrode; and

capacitor insulator material between the second capacitor electrode and the first capacitor electrode, the capacitor comprising an intrinsic current leakage path from one of the first and second capacitor electrodes to the other through the capacitor insulator material;

a parallel current leakage path between the second capacitor electrode and the first capacitor electrode; the parallel current leakage path being circuit-parallel with the intrinsic current leakage path, of lower total resistance than the intrinsic current leakage path, and comprising leaker material that is everywhere laterally-outward of laterally-innermost surfaces of the laterally-spaced walls of the first capacitor electrode; and

the leaker material comprises laterally-spaced walls in a capacitor opening that are laterally thinner in the capacitor opening than individual of the laterally-spaced walls of the first capacitor electrode in the capacitor opening.

6. A memory cell, comprising:

a capacitor comprising:

a first capacitor electrode having laterally-spaced walls;

a second capacitor electrode comprising a portion above the first capacitor electrode; and

capacitor insulator material between the second capacitor electrode and the first capacitor electrode, the capacitor comprising an intrinsic current leakage path from one of the first and second capacitor electrodes to the other through the capacitor insulator material;

a parallel current leakage path between the second capacitor electrode and the first capacitor electrode; the parallel current leakage path being circuit-parallel with the intrinsic current leakage path, of lower total resistance than the intrinsic current leakage path, and comprising leaker material that is everywhere laterally-outward of laterally-innermost surfaces of the laterally-spaced walls of the first capacitor electrode; and

at least some of the leaker material is laterally-outward of laterally-outermost surfaces of the laterally-spaced walls of the first capacitor electrode.

7. A memory cell, comprising:

a capacitor comprising:

a first capacitor electrode having laterally-spaced walls;

a second capacitor electrode comprising a portion above the first capacitor electrode; and

capacitor insulator material between the second capacitor electrode and the first capacitor electrode, the capacitor insulator material being directly above the laterally-spaced walls of the first capacitor electrode, the capacitor comprising an intrinsic current leakage path from one of the first and second capacitor electrodes to the other through the capacitor insulator material;

a parallel current leakage path between the second capacitor electrode and the first capacitor electrode; the parallel current leakage path being circuit-parallel with the intrinsic current leakage path, of lower total resistance than the intrinsic current leakage path, and comprising leaker material that is everywhere laterally-outward of laterally-innermost surfaces of the laterally-spaced walls of the first capacitor electrode; and

wherein the leaker material has maximum lateral thickness above individual of the laterally-spaced walls of the first capacitor electrode that is greater than maximum lateral thickness of the capacitor insulator material below topmost surfaces of the individual laterally-spaced walls of the first capacitor electrode.

8. A memory cell, comprising:

a capacitor comprising:

a first capacitor electrode having laterally-spaced walls;

a second capacitor electrode comprising a portion above the first capacitor electrode; and

capacitor insulator material between the second capacitor electrode and the first capacitor electrode, the capacitor comprising an intrinsic current leakage path from one of the first and second capacitor electrodes to the other through the capacitor insulator material;

a parallel current leakage path between the second capacitor electrode and the first capacitor electrode; the parallel current leakage path being circuit-parallel with the intrinsic current leakage path, of lower total resistance than the intrinsic current leakage path, and comprising leaker material that is everywhere laterally-outward of laterally-innermost surfaces of the laterally-spaced walls of the first capacitor electrode; and

wherein the leaker material is directly above less than all of topmost surfaces of the laterally-spaced walls of the first capacitor electrode.

9. A memory cell, comprising:

a capacitor comprising:

a first capacitor electrode having laterally-spaced walls;

a second capacitor electrode comprising a portion above the first capacitor electrode; and

capacitor insulator material between the second capacitor electrode and the first capacitor electrode, the capacitor comprising an intrinsic current leakage path from one of the first and second capacitor electrodes to the other through the capacitor insulator material;

a parallel current leakage path between the second capacitor electrode and the first capacitor electrode; the parallel current leakage path being circuit-parallel with the intrinsic current leakage path, of lower total resistance than the intrinsic current leakage path, and comprising leaker material that is everywhere laterally-outward of laterally-innermost surfaces of the laterally-spaced walls of the first capacitor electrode; and

the leaker material is not directly above a topmost surface of the capacitor insulator material.

10. A memory cell, comprising:

a capacitor comprising:

a first capacitor electrode having laterally-spaced walls;

a second capacitor electrode comprising a portion above the first capacitor electrode; and

capacitor insulator material between the second capacitor electrode and the first capacitor electrode, the capacitor comprising an intrinsic current leakage path from one of the first and second capacitor electrodes to the other through the capacitor insulator material;

a parallel current leakage path between the second capacitor electrode and the first capacitor electrode; the parallel current leakage path being circuit-parallel with the intrinsic current leakage path, of lower total resistance than the intrinsic current leakage path, and comprising leaker material that is everywhere laterally-outward of laterally-innermost surfaces of the laterally-spaced walls of the first capacitor electrode; and

the leaker material is not directly against any lateral sidewall surface of the second capacitor electrode.

11. A memory cell, comprising:

a capacitor comprising:

a first capacitor electrode having laterally-spaced walls;

a second capacitor electrode comprising a portion above the first capacitor electrode; and

capacitor insulator material between the second capacitor electrode and the first capacitor electrode, the capacitor comprising an intrinsic current leakage path from one of the first and second capacitor electrodes to the other through the capacitor insulator material; and

a parallel current leakage path between the second capacitor electrode and the first capacitor electrode; the parallel current leakage path being circuit-parallel with the intrinsic current leakage path, of lower total resistance than the intrinsic current leakage path, and comprising leaker material at least some of which is laterally-outward of laterally-outermost surfaces of the laterally-spaced walls of the first capacitor electrode.

12. The memory cell of claim 11 wherein only some of the leaker material is laterally-outward of the laterally-outermost surfaces of the laterally-spaced walls of the first capacitor electrode.

13. A memory cell, comprising:

a capacitor comprising:

a first capacitor electrode having laterally-spaced walls;

a second capacitor electrode comprising a portion above the first capacitor electrode; and

capacitor insulator material between the second capacitor electrode and the first capacitor electrode, the capacitor comprising an intrinsic current leakage path from one of the first and second capacitor electrodes to the other through the capacitor insulator material; and

a parallel current leakage path between the second capacitor electrode and the first capacitor electrode; the parallel current leakage path being circuit-parallel with the intrinsic current leakage path, of lower total resistance than the intrinsic current leakage path, and comprising leaker material that has maximum lateral thickness directly above individual of the laterally-spaced walls of the first capacitor electrode that is greater than maximum lateral thickness of the capacitor insulator material directly above the individual laterally-spaced walls of the first capacitor electrode.

14. A memory cell, comprising:

a capacitor comprising:

a first capacitor electrode having laterally-spaced walls that individually have a topmost surface;

a second capacitor electrode comprising a portion above the first capacitor electrode; and

capacitor insulator material between the second capacitor electrode and the first capacitor electrode, the capacitor comprising an intrinsic current leakage path from one of the first and second capacitor electrodes to the other through the capacitor insulator material; and

a parallel current leakage path between the second capacitor electrode and the first capacitor electrode; the parallel current leakage path being circuit-parallel with the intrinsic current leakage path, of lower total resistance than the intrinsic current leakage path, and comprising leaker material that is directly above less than all of the topmost surfaces of the laterally-spaced walls of the first capacitor electrode.

15. A memory cell, comprising:

a capacitor comprising:

a first capacitor electrode;

a second capacitor electrode comprising a portion above the first capacitor electrode; and

capacitor insulator material between the second capacitor electrode and the first capacitor electrode, the capacitor comprising an intrinsic current leakage path from one of the first and second capacitor electrodes to the other through the capacitor insulator material; and

a parallel current leakage path between the second capacitor electrode and the first capacitor electrode; the parallel current leakage path being circuit-parallel with the intrinsic current leakage path, of lower total resistance than the intrinsic current leakage path, and comprising leaker material that is not directly above a topmost surface of the capacitor insulator material.

16. A memory cell, comprising:

a capacitor comprising:

a first capacitor electrode;

a second capacitor electrode comprising a portion above the first capacitor electrode; and

capacitor insulator material between the second capacitor electrode and the first capacitor electrode, the capacitor comprising an intrinsic current leakage path from one of the first and second capacitor electrodes to the other through the capacitor insulator material; and

a parallel current leakage path between the second capacitor electrode and the first capacitor electrode; the parallel current leakage path being circuit-parallel with the intrinsic current leakage path, of lower total resistance than the intrinsic current leakage path, and comprising leaker material that is not directly against any lateral sidewall surface of the second capacitor electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2019
From: MUTCH, MICHAEL; CHAVAN, ASHONITA A.; CHHAJED, SAMEER; COOK, BETH R.; MUTHUKRISHNAN, KAMAL KUMAR; RAMASWAMY, DURAI VISHAK NIRMAL; WILLIAMSON, LANCE
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050862/0085 →
Continuity (1)
Related Publication 20210012824A1 · Jan 14, 2021
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