Semiconductor device and method for manufacturing the same
A semiconductor device includes a predetermined number of leads, a semiconductor element electrically connected to the leads and supported by one of the leads, and a sealing resin that covers the semiconductor element and a part of each lead. Each lead includes some portions exposed from the sealing resin. A surface plating layer is formed on at least one of the exposed portions of the respective leads.
1. A semiconductor device comprising:
a first lead including an obverse surface and a reverse surface that are spaced apart from each other in a thickness direction;
a semiconductor element supported by the first lead; and
a sealing resin covering the semiconductor element and a part of the first lead, the sealing resin comprising a first side surface and a reverse surface, wherein:
the first lead includes portions exposed from the sealing resin, the exposed portions include a first exposed portion and a second exposed portion, the first exposed portion being exposed at the first side surface of the sealing resin, the second exposed portion being exposed at the reverse surface of the sealing resin, each of the first exposed portion and the second exposed portion being formed with a surface plating layer,
the first side surface of the sealing resin comprises a first portion and a second portion, the first portion being outwardly offset from the second portion as viewed in the thickness direction, and
the first exposed portion of the first lead is disposed at the second portion of the first side surface of the sealing resin.
2. The semiconductor device according to claim 1 , wherein the first lead comprises a third exposed portion that is exposed at a second side surface of the sealing resin, and the third exposed portion is formed with no plating layer.
3. The semiconductor device according to claim 1 , further comprising a second lead connected to the semiconductor element, wherein the second lead comprises: a first exposed portion that is exposed at the first side surface of the sealing resin; and a second exposed portion that is exposed at the reverse surface of the sealing resin, each of the first exposed portion of the second lead and the second exposed portion of the second lead being formed with a surface plating layer.
4. The semiconductor device according to claim 3 , wherein the second lead comprises a third exposed portion that is exposed at a second side surface of the sealing resin, and the third exposed portion is formed with no plating layer.
5. The semiconductor device according to claim 1 , wherein the surface plating layer has a higher solder wettability than a base material of the first lead.
6. The semiconductor device according to claim 5 , wherein the base material comprises Cu.
7. The semiconductor device according to claim 6 , wherein the surface plating layer is made of Au.
8. The semiconductor device according to claim 1 , wherein the surface plating layer is formed by substitutional electroless plating.
9. The semiconductor device according to claim 1 , wherein at least a part of the surface plating layer is formed directly on a base material of the first lead.
10. The semiconductor device according to claim 9 , wherein an entirety of the surface plating layer is formed directly on the base material of the first lead.
11. The semiconductor device according to claim 1 , further comprising an intermediate plating layer disposed between the surface plating layer and the first lead.
12. The semiconductor device according to claim 11 , wherein the intermediate plating layer is formed on the obverse surface and the reverse surface of the first lead.
13. The semiconductor device according to claim 1 , wherein the first lead comprises a terminal end face that is flush with the first side surface of the sealing resin.
14. The semiconductor device according to claim 11 , wherein the reverse surface of the first lead is flush with the reverse surface of the sealing resin.
15. The semiconductor device according to claim 1 , wherein the first lead is formed with a recess that is disposed at the reverse surface of the first lead and covered with the sealing resin.
16. The semiconductor device according to claim 15 , wherein the semiconductor element is disposed at a position avoiding the recess of the first lead as viewed in the thickness direction.
17. The semiconductor device according to claim 1 , further comprising an additional lead and a wire, wherein:
the additional lead includes an obverse surface and a reverse surface that are spaced apart from each other in the thickness direction, the additional lead being formed with a recess that is disposed at the reverse surface of the additional lead and covered with the sealing resin, and
the wire having a first end and a second end that are bonded to the semiconductor element and the additional lead, respectively, the second end of the wire being disposed at a position avoiding the recess of the additional lead as viewed in the thickness direction.