IP Library Granted Patent US 10,608,007
Granted Patent B2
US 10,608,007 · App. 16/511,111 · Granted Mar 31, 2020

Semiconductor memory device and method for manufacturing the same

Inventors: Hiroki Tokuhira (Kawasaki, JP); Takahisa Kanemura (Yokohama, JP); Shigeo Kondo (Yokkaichi, JP); Michiru Hogyoku (Yokohama, JP)
Assignee: TOSHIBA MEMORY CORPORATION
H01L27/1157H01L27/11582H01L29/40117
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Quick Facts
Patent No.
US 10,608,007
App. No.
16/511,111
Granted
Mar 31, 2020
Kind
B2
Abstract

A semiconductor memory device according to an embodiment includes a first stacked body, a second stacked body, an intermediate conductive layer, an intermediate insulating layer, a semiconductor pillar, a charge storage film, and an insulating film. The semiconductor pillar includes a first part, a second part, and a third part. The charge storage film includes a first charge storage portion and a second charge storage portion. The charge storage film includes at least one first element selected from the group consisting of nitrogen, hafnium, and aluminum. The insulating film provides in at least a portion between the intermediate conductive layer and the first part. The insulating film not includes the first element, or the insulating film has a concentration of the first element lower than a concentration of the first element of the charge storage film.

Claims (51)

1. A semiconductor memory device, comprising:

a stacked body including

a first stacked unit and a second stacked unit stacked above the first stacked unit, each of the first and second stacked units including a plurality of electrode layers alternately stacked with a plurality of first insulating layers therebetween, and

an intermediate insulating layer provided above the first stacked unit and below the second stacked unit; and

a pillar including a core insulator and a semiconductor film covering an outer periphery of the core insulator, the pillar piercing the stacked body in a stacking direction of the stacked body and including a first part and an intermediate part, the first part being provided inside the first stacked unit and the intermediate part being provided inside the intermediate insulating layer, wherein

a width of the core insulator and a width of the semiconductor film in a first direction perpendicular to the stacking direction are broadening locally in the intermediate part, and

a first nitrogen-containing film is provided between the intermediate insulating layer and a locally broadening portion of the semiconductor film in the first direction, the first nitrogen-containing film being discontinuous with an uppermost portion of a second nitrogen-containing film provided between the electrode layers of the first stacked unit and the first part of the pillar.

2. The device according to claim 1 , wherein

the width of the core insulator and the width of the semiconductor film are broadening on both sides in the first direction.

3. The device according to claim 1 , further comprising:

a tunneling insulating film provided between the second nitrogen-containing film and the first part of the pillar.

4. The device according to claim 1 , wherein

the first nitrogen-containing film has a tubular configuration.

5. The device according to claim 1 , wherein

the first nitrogen-containing film surrounds the locally broadening portion of the semiconductor pillar in the first direction.

6. The device according to claim 1 , wherein

the pillar further includes a second part provided inside the second stacked unit.

7. The device according to claim 1 , wherein

a thickness of the intermediate insulating layer is greater than respective thicknesses of the first insulating layers.

8. The device according to claim 1 , wherein

a material of the first nitrogen-containing film and a material of the second nitrogen-containing film are same with each other.

9. A semiconductor memory device, comprising:

first memory cells provided in a first stacked body including a plurality of first electrode layers alternately stacked with a plurality of first insulating layers therebetween, the first memory cells having the first electrode layers and a first semiconductor film portion extending inside the first electrode layers with first memory film portions interposed therebetween;

second memory cells provided in a second stacked body including a plurality of second electrode layers alternately stacked with a plurality of second insulating layers therebetween, the second stacked body being stacked above the first stacked body, the second memory cells having the second electrode layers and a second semiconductor film portion extending inside the second electrode layers with second memory film portions interposed therebetween;

a first intermediate layer of a first material provided above the first stacked body and below the second stacked body;

a second intermediate layer of a second material different from the first material, the second intermediate layer being provided between the first stacked body and the first intermediate layer; and

a third semiconductor film portion extending inside the first intermediate layer, the first semiconductor film portion being electrically connected to the second semiconductor film portion via the third semiconductor film portion, and the first, second and third semiconductor film portions being provided in a hole piercing the first and second stacked bodies and the first and second intermediate layers in a stacking direction of the first and second stacked bodies, wherein

a diameter of the hole in a first direction perpendicular to the stacking direction is broadening locally in the first intermediate layer, and

a first nitrogen-containing film is provided between the first intermediate layer and the third semiconductor film portion and a second nitrogen-containing film is provided between an uppermost first electrode layer of the first electrode layers and the first semiconductor film portion, the first nitrogen-containing film being discontinuous with the second nitrogen-containing film at a level included in the second intermediate layer in the stacking direction.

10. The device according to claim 9 , wherein

the diameter of the hole is broadening on both sides in the first direction.

11. The device according to claim 9 , wherein

the first semiconductor film portion is positioned at an outer periphery of a first core insulator part and the second semiconductor film portion is positioned at an outer periphery of a second core insulator part.

12. The device according to claim 11 , wherein

the third semiconductor film portion is positioned at an outer periphery of a third core insulator part.

13. The device according to claim 12 , wherein

a maximum diameter of the third core insulator part is greater than a diameter of the second core insulator part at a level corresponding to a lowermost second electrode layer of the second electrode layers in the first direction.

14. The device according to claim 13 , wherein

the maximum diameter of the third core insulator part is broadening on both sides in the first direction compared to the diameter of the second core insulator part.

15. The device according to claim 12 , wherein

the third semiconductor film portion is bent in the stacking direction inside the first intermediate layer.

16. The device according to claim 9 , further comprising:

a tunneling insulating film provided between the second nitrogen-containing film and the first semiconductor film portion.

17. The device according to claim 9 , wherein

the first nitrogen-containing film has a tubular configuration.

18. The device according to claim 9 , wherein

a thickness of the first intermediate layer is greater than respective thicknesses of the first insulating layers.

19. The device according to claim 9 , wherein

the thickness of the first intermediate layer is greater than respective thicknesses of the second insulating layers.

20. The device according to claim 9 , wherein

a material of the first nitrogen-containing film and a material of the second nitrogen-containing film are same with each other.

Assignments (3)
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
Continuity (4)
Continuation 15863490 · Jan 5, 2018
Continuation 15264903 · Sep 14, 2016
Provisional Application 62306672 · Mar 11, 2016
Related Publication 20190341391A1 · Nov 7, 2019