Transistor device having a source region segments and body region segments

1. An apparatus, comprising:

a first trench disposed in a semiconductor region and including a gate electrode;

a second trench disposed in the semiconductor region;

a mesa region disposed between the first trench and the second trench, the mesa region having a length aligned along a longitudinal axis orthogonal to a vertical axis aligned along a height of the mesa region;

a plurality of source region segments of a first conductivity type disposed in a side of the mesa region; and

a plurality of body region segments of a second conductivity type disposed in the side of the mesa region, the plurality of body region segments defining an alternating pattern with the plurality of source region segments along the side of the mesa regionm, the alternating pattern being aligned along the longitudinal axis.

2. The apparatus of claim 1 , wherein each of the plurality of source region segments is separated from another of the plurality of source region segments by a body region segment from the plurality of body region segments.

3. The apparatus of claim 1 , wherein each of the plurality of body region segments is connected to a channel region disposed between the first trench and the second trench.

4. The apparatus of claim 3 , wherein the channel region is disposed below the plurality of body region segments.

5. The apparatus of claim 1 , wherein the plurality of source region segments are a first plurality of source region segments, the side of the mesa region is a first side of the mesa region,

the apparatus further comprising:

a second plurality of source region segments disposed on a second side of the mesa region opposite the first side of the mesa region.

6. The apparatus of claim 1 , wherein the plurality of body region segments are a first plurality of body region segments, the plurality of source region segments are a first plurality of source region segments, the side of the mesa region is a first side of the mesa region,

the apparatus further comprising:

a second plurality of body region segments and a second plurality of body region segments disposed on a second side of the mesa region opposite the first side of the mesa region.

7. The apparatus of claim 1 , wherein the plurality of body region segments are a first plurality of body region segments, the plurality of source region segments are a first plurality of source region segments, the side of the mesa region is a first side of the mesa region,

the apparatus further comprising:

a second plurality of body region segments disposed on a second side of the mesa region opposite the first side of the mesa region, the second plurality of body region segments alternating with a second plurality of source region segments along the second side of the mesa region.

8. The apparatus of claim 1 , wherein the plurality of body region segments are a first plurality of body region segments, the plurality of source region segments are a first plurality of source region segments, the side of the mesa region is a first side of the mesa region,

the apparatus further comprising:

a second plurality of body region segments disposed on a second side of the mesa region opposite the first side of the mesa region, the second plurality of body region segments alternating with a second plurality of source region segments along the second side of the mesa region such that a checkerboard pattern is defined on a top surface of the mesa region by the first plurality of body region segments, the second plurality of body region segments, the first plurality of source region segments, and the second plurality of source region segments.

9. The apparatus of claim 1 , wherein the mesa region is aligned along a vertical axis, the vertical axis is aligned along a depth direction of the first trench and the second trench.

10. The apparatus of claim 1 , further comprising:

a source conductor in contact with the plurality of source region segments and defining an Ohmic contact.

11. The apparatus of claim 1 , wherein the longitudinal axis of the mesa region is orthogonal to a width of the mesa region, and the side is on one side of the vertical axis.

12. The apparatus of claim 1 , wherein the apparatus is configured with the plurality of source region segments and the plurality of body region segments to minimize a width of the mesa region and an Ron*area penalty.

13. An apparatus, comprising:

a first trench disposed in a semiconductor region and including a gate electrode;

a second trench disposed in the semiconductor region;

a mesa region disposed between the first trench and the second trench;

a channel region disposed in the mesa region;

a plurality of source region segments of a first conductivity type on a first side of the mesa region;

a plurality of body region segments of a second conductivity type alternating with the plurality of source region segments on the first side of the mesa region; and

a continuous source region disposed on a second side of the mesa region, the continuous source region being disposed above the channel region and having a length greater than a length of a source region segment of the plurality of source region segments, each of the plurality of body region segments being connected to the channel region, the channel region being a continuous region disposed below each of the plurality of source region segments.

14. The apparatus of claim 13 , wherein the channel region is disposed between the first trench and the second trench.

15. The apparatus of claim 13 , wherein each of the plurality of source region segments is connected, on the second side of the mesa region, with the continuous source region.

16. The apparatus of claim 13 , wherein each of the plurality of body region segments is in contact, on the second side of the mesa region, with the continuous source region.

17. The apparatus of claim 13 , further comprising:

a source conductor in contact with the plurality of source region segments;

a drain conductor; and

a substrate in contact with an epitaxial layer.

18. The apparatus of claim 13 , wherein the mesa region has a top surface disposed above a top surface of an electrode disposed in the first trench.

19. An apparatus, comprising:

a first trench and a second trench in a semiconductor region with a continuous mesa region defined between the first trench and the second trench;

a dielectric layer along a sidewall of each of the first trench and the second trench;

an electrode disposed in each of the first trench and the second trench;

a plurality of source region segments of a first conductivity type disposed in at least a portion of a side of the continuous mesa region; and

a plurality of body region segments of a second conductivity type disposed in the at least the side of the continuous mesa region, the plurality of body region segments defining an alternating pattern with the plurality of source region segments along the side of the continuous mesa region.

20. The apparatus of claim 19 , further comprising:

a body contact enhancement disposed along a portion of the continuous mesa region, the continuous mesa region being a single mesa region.

21. The apparatus of claim 19 , further comprising:

the plurality of source region segments formed using a first mask,

the plurality of body region segments formed using a second mask,

the first mask covering an area where the plurality of body region segments are formed and the second mask covering an area where the plurality of source region segments are formed.

22. The apparatus of claim 19 , wherein the continuous mesa region spans at least two of the plurality of source region segments.