IP Library Granted Patent US 11,069,734
Granted Patent B2
US 11,069,734 · App. 16/513,489 · Granted Jul 20, 2021

Image sensor device

Inventor: Rajesh Katkar (Milpitas, CA)
Assignee: INVENSAS CORPORATION
H01L27/14634H01L21/76898H01L23/481H01L24/18H01L27/1464H01L27/1469H01L27/14618H01L27/14636H01L27/14687H01L2224/04105H01L2224/12105H01L2224/18H01L2224/19H01L2224/32145H01L2224/73267H01L2924/15153H01L2924/16235
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Quick Facts
Patent No.
US 11,069,734
App. No.
16/513,489
Granted
Jul 20, 2021
Kind
B2
Abstract

Methods of forming a back side image sensor device, as well as back side image sensor devices formed, are disclosed. In one such a method, an image sensor wafer having a first dielectric layer with a first surface is obtained. A reconstituted wafer having a processor die and a second dielectric layer with a second surface is obtained. The reconstituted wafer and the image sensor wafer are bonded to one another including coupling the first surface of the first dielectric layer and the second surface of the second dielectric layer. In another method, such formation is for a processor die bonded to an image sensor wafer. In yet another method, such formation is for a processor die bonded to an image sensor die.

Claims (53)

1. A method, comprising:

obtaining an image sensor wafer having a first dielectric layer with a first surface;

obtaining a reconstituted wafer having a processor die and a second dielectric layer with a second surface;

wherein the reconstituted wafer comprises the processor die, a controller die and a memory die structurally coupled to one another with a molding material to provide the reconstituted wafer; and

bonding the reconstituted wafer and the image sensor wafer to one another including coupling the first surface of the first dielectric layer and the second surface of the second dielectric layer.

2. The method according to claim 1 , further comprising forming a set of conductive vias including through the image sensor wafer, the first dielectric layer and the second dielectric layer for electrical conductivity with the processor die.

3. The method according to claim 2 , wherein the set of conductive vias is a first set of conductive vias, the method further comprising forming a second set of conductive vias including through the image sensor wafer but not through the second dielectric layer for electrical conductivity with the image sensor wafer.

4. The method according to claim 1 , further comprising:

plasma activating at least one of the first surface of the first dielectric layer or the second surface of the second dielectric layer before the bonding; and

the bonding includes placing the first surface and the second surface in contact with one another for a wafer-to-wafer direct bonding at room temperature without any adhesive between the first surface and the second surface.

5. The method according to claim 4 , further comprising thinning a back side of the image sensor wafer.

6. The method according to claim 1 , wherein:

the first dielectric layer includes a first plurality of metallic pads;

the second dielectric layer includes a second plurality of metallic pads; and

the coupling comprises interconnecting first surfaces of the first plurality of metallic pads of the first surface and second surfaces of the second plurality of metallic pads of the second surface directly to one another for electrical connectivity.

7. The method according to claim 6 , wherein the bonding is a wafer-to-wafer adhesiveless direct bonding of the image sensor wafer and the reconstituted wafer.

8. The method according to claim 6 , further comprising forming conductive vias with a continuous piece of metal extending through the image sensor wafer, the first dielectric layer and the second dielectric layer for electrical conductivity with the processor die.

9. The method according to claim 6 , further comprising forming conductive vias with a continuous piece of metal including extending through the image sensor wafer and the first dielectric layer and not through the second dielectric layer.

10. The method according to claim 6 , further comprising forming conductive vias with a continuous piece of metal including extending through the image sensor wafer.

11. A method, comprising:

obtaining an image sensor reconstituted wafer having a plurality of image sensor devices structurally coupled to one another with a molding material and having a first dielectric layer with a first surface;

obtaining a processor die having a second dielectric layer with a second surface;

the first dielectric layer including a first plurality of metallic pads of a first metal layer;

the second dielectric layer including a second plurality of metallic pads of a second metal layer;

bonding the processor die and the image sensor reconstituted wafer to one another including coupling the first surface of the first dielectric layer and the second surface of the second dielectric layer to one another; and

the coupling comprising interconnecting first surfaces of the first plurality of metallic pads of the first surface and second surfaces of the second plurality of metallic pads of the second surface directly to one another for electrical connectivity.

12. The method according to claim 11 , wherein the second dielectric layer of the processor die is directly bonded to the first dielectric layer of the image sensor reconstituted wafer without any adhesive between the first surface and the second surface.

13. The method according to claim 12 , further comprising:

depositing a dielectric material around sides of the processor die; and

forming conductive pathways through the dielectric material coupled for electrical conductivity to at least one of a plurality of metal layers of the image sensor reconstituted wafer before or after the depositing.

14. The method according to claim 13 , wherein the conductive pathways are plated pillars or vias, the method further comprising forming a redistribution layer on the dielectric material and interconnected to the conductive pathways for electrical communication.

15. The method according to claim 12 , further comprising:

obtaining a memory die having a third dielectric layer with a third surface;

the third dielectric layer including a third plurality of metallic pads of a third metal layer;

bonding the memory die and the image sensor reconstituted wafer to one another including coupling the first surface of the first dielectric layer and the third surface of the third dielectric layer to one another; and

the coupling comprising interconnecting other first surfaces of the first plurality of metallic pads of the first surface and third surfaces of the third plurality of metallic pads of the third surface directly to one another for electrical connectivity.

16. The method according to claim 11 , further comprising:

depositing a dielectric material around sides of the processor die; and

forming a set of conductive vias including through the image sensor reconstituted wafer for electrical conductivity to at least one of a plurality of metal layers of the image sensor reconstituted wafer.

17. A method, comprising:

obtaining an image sensor wafer having a first dielectric layer with a first surface;

obtaining a processor die having a second dielectric layer with a second surface;

the first dielectric layer including a first plurality of metallic pads of a first metal layer;

the second dielectric layer including a second plurality of metallic pads of a second metal layer;

the processor die having a third surface opposite the second surface; and

bonding the processor die and the image sensor wafer to one another including coupling the first surface of the first dielectric layer of the image sensor wafer and the third surface of the processor die.

18. The method according to claim 17 , further comprising applying an adhesive to at least one of the third surface or the first surface for the bonding.

19. The method according to claim 17 , wherein the processor die has a third dielectric layer having the third surface, the method further comprising:

plasma activating at least one of the first surface of the first dielectric layer or the third surface of the third dielectric layer before the bonding; and

the bonding includes placing the first surface and the third surface in contact with one another for a direct bonding at room temperature without any adhesive between the first surface and the third surface.

20. The method according to claim 17 , further comprising:

depositing a dielectric material around sides of the processor die: and

forming conductive pathways for electrical conductivity to at least one of a plurality of metal layers of the image sensor wafer before or after the depositing.

Assignments (4)
CERTIFICATE OF CONVERSION & CHANGE OF NAME Recorded Apr 4, 2022
From: INVENSAS CORPORATION
To: INVENSAS LLC
Reel/Frame 059581/0435 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 17, 2019
From: KATKAR, RAJESH
To: INVENSAS CORPORATION
Reel/Frame 049773/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2019
From: KATKAR, RAJESH
To: INVENSAS CORPORATION
Reel/Frame 049769/0346 →