Crosstalk mitigation for PCB to die transition in superconducting devices
The subject disclosure relates generally to a method of implementing magnetic shielding walls with specific respective dimensions to reduce crosstalk between transmission lines in wire-bonds for supercomputing chipsets. In one embodiment, the device comprises: a chip-set comprised of superconducting materials; at least one superconducting data line attached to chip-set dies by a set of wire bonds; and magnetic shielding walls that respectively isolate the set of wire bonds.
1. A device, comprising:
a set of wire bonds that attach at least one superconducting data line to chip-set dies; and
magnetic shielding walls that respectively isolate the set of wire bonds.
2. The device of claim 1 , wherein at least one of the magnetic shielding walls has a first height that is about greater than or equal to two times a second height of at least one wire bond extension.
3. The device of claim 1 , wherein at least one of the magnetic shielding walls has a first length that is about greater than or equal to five times a second height of at least one wire bond extension.
4. The device of claim 1 , wherein at least one of the magnetic shielding walls has a thickness that is about greater than or equal to skin depth.
5. The device of claim 1 , wherein a set of magnetic shielding walls shields the at least one superconducting data lines from cross talk.
6. The device of claim 5 , wherein two pairs of magnetic shielding walls respectively shield each end of the at least one superconducting data line.
7. The device of claim 1 , wherein the at least one superconducting data line comprises a type I superconducting material, and a set of the shielding walls have thicknesses that are a function of London penetration.
8. The device of claim 1 , wherein at least one of the magnetic shielding walls is soldered at a transition of the quantum chip-set.
9. The device of claim 1 , wherein the magnetic shielding walls attenuate crosstalk to lower than −50 dB.
10. The device of claim 1 , wherein the magnetic shielding walls attenuate crosstalk to lower than −60 dB.
11. The device of claim 1 , wherein the magnetic shielding walls attenuate crosstalk to lower than −70 dB.
12. The device of claim 1 , wherein the device is a quantum computing device.
13. A method to fabricate a quantum computing device, the method comprising:
attaching at least one superconducting data line to chip set dies by a set of wire bonds; and
forming magnetic shielding walls that respectively isolate respective wire bonds.
14. The method of claim 13 , further comprising forming at least one of the shielding walls to have a first height that is about greater than or equal to two times a second height of at least one wire bond extension.
15. The method of claim 13 , further comprising forming at least one of the shielding walls has a length that is about greater than or equal to five times a height of at least one wire bond extension.
16. The method of claim 13 , further comprising:
forming a set of magnetic shielding walls to shield the at least one superconducting data lines from cross talk.
17. The method of claim 13 , further comprising forming the magnetic shield walls to attenuate crosstalk across superconducting data lines to lower than −50 dB.
18. A device, comprising:
at least one superconducting data line attached to chip set dies by a set of wire bonds; and
magnetic shielding walls that respectively isolate respective wire bonds,
wherein at least one of the shielding walls has a first height that is about greater than or equal to two times a second height of at least one wire bond extension, and
wherein two pairs of magnetic shielding walls respectively shield each end of the at least one superconducting data line.
19. The device of claim 18 , wherein the magnetic shielding walls attenuate crosstalk to lower than −50 dB.
20. The device of claim 18 , wherein the magnetic shielding walls attenuate crosstalk to lower than −60 dB.