I3C point to point

1. A method for data communication performed at a master device, comprising:

identifying a slave device coupled to the master device through a serial interface;

determining that no other device is actively coupled to the master device through the serial interface;

configuring one or more registers of the slave device to cause the slave device to enter a point-to-point mode of operation;

configuring the serial interface for the point-to-point mode of operation;

transmitting a first command through the serial interface, wherein the first command corresponds to an Improved Inter-Integrated Circuit (I3C) command in which a slave address is truncated to a single address bit, and wherein the first command includes a read/write bit;

initiating a transaction through the serial interface, wherein the transaction is identified as a read or write transaction by the first command and is conducted in accordance with an I3C protocol; and

transmitting a reset pattern through the serial interface, the reset pattern being configured to cause the slave device to exit the point-to-point mode of operation.

2. The method of claim 1 , wherein the transaction comprises one or more data frames formatted in accordance with the I3C protocol.

3. The method of claim 1 , further comprising:

transmitting a second command when the serial interface is configured for the point-to-point mode of operation, including:

transmitting a first address bit of an I3C Common Command Code;

refraining from transmitting all remaining bits of the I3C Common Command Code when the first address bit has a first value;

transmitting all remaining bits of the I3C Common Command Code when the first address bit has a second value;

transmitting a second read/write bit; and

conducting a private transaction when the first address bit has the first value, the second read/write bit selecting between a private read transaction and a private write transaction.

4. The method of claim 1 , further comprising:

receiving an acknowledgement from the slave device in response to the first command.

5. The method of claim 1 , further comprising:

initiating transmission of a third command through the serial interface, wherein the third command includes a truncated slave address field comprising a single bit; and

initiating an in-band interrupt service procedure when a data line of the serial interface is driven by the slave device before completion of transmission of the single bit in the truncated slave address field.

6. The method of claim 5 , further comprising:

transferring control of the serial interface to the slave device after completion of the in-band interrupt service procedure.

7. An apparatus for data communication, comprising:

a serial interface having a clock line and a data line; and

a processor configured to:

identify a slave device coupled to the apparatus through the serial interface;

determine that no other device is actively coupled to the apparatus through the serial interface;

configure one or more registers of the slave device to cause the slave device to enter a point-to-point mode of operation;

configure the serial interface for the point-to-point mode of operation;

transmit a first command through the serial interface, wherein the first command corresponds to an Improved Inter-Integrated Circuit (I3C) command in which a slave address is truncated to a single address bit, and wherein the first command includes a read/write bit;

initiate a transaction through the serial interface, wherein the transaction is identified as a read or write transaction by the first command and is conducted in accordance with an I3C protocol; and

transmit a reset pattern through the serial interface, the reset pattern being configured to cause the slave device to exit the point-to-point mode of operation.

8. The apparatus of claim 7 , wherein the transaction comprises one or more data frames formatted in accordance with the I3C protocol.

9. The apparatus of claim 7 , wherein the processor is further configured to:

transmit a second command when the serial interface is configured for the point-to-point mode of operation, by:

transmitting a first address bit of an I3C Common Command Code;

refraining from transmitting all remaining bits of the I3C Common Command Code when the first address bit has a first value;

transmitting all remaining bits of the I3C Common Command Code when the first address bit has a second value;

transmitting a second read/write bit; and

conducting a private transaction when the first address bit has the first value, the second read/write bit selecting between a private read transaction and a private write transaction.

10. The apparatus of claim 7 , wherein the processor is further configured to:

receive an acknowledgement from the slave device in response to the first command.

11. The apparatus of claim 7 , wherein the processor is further configured to:

initiate transmission of a third command through the serial interface, wherein the third command includes a truncated slave address field comprising a single bit; and

initiate an in-band interrupt service procedure when the data line is driven by the slave device before completion of transmission of the single bit in the truncated slave address field.

12. The apparatus of claim 11 , wherein the processor is further configured to:

transfer control of the serial interface to the slave device after completion of the in-band interrupt service procedure.

13. A method for data communication performed at a slave device, comprising:

configuring a serial interface for a point-to-point mode of operation;

receiving a first command through the serial interface, wherein the first command corresponds to an Improved Inter-Integrated Circuit (I3C) command in which a slave address is truncated to a single address bit, and wherein the first command includes a read/write bit; and

participating in a first transaction conducted through the serial interface, wherein the first transaction is identified as a read or write transaction by the first command and is conducted in accordance with an I3C protocol; and

receiving a second command when the serial interface is configured for the point-to-point mode of operation, including:

receiving only a first address bit of an I3C Common Command Code when the first address bit has a first value;

receiving a plurality of additional address bits in the I3C Common Command Code when the first address bit has a second value; and

participating in a private transaction when the first address bit has the first value, wherein a second read/write bit transmitted after the first address bit selects between a private read transaction and a private write transaction.

14. The method of claim 13 , wherein the first transaction comprises one or more data frames formatted in accordance with the I3C protocol.

15. The method of claim 13 , further comprising:

transmitting an acknowledgement in response to the first command.

16. The method of claim 13 , further comprising:

detecting a START condition on the serial interface after the first transaction has been completed; and

driving a data line of the serial interface to request an in-band interrupt service procedure.

17. The method of claim 16 , further comprising:

obtaining control of the serial interface after completion of the in-band interrupt service procedure.

18. The method of claim 13 , further comprising:

detecting a reset pattern in a signal received from the serial interface; and

exiting the point-to-point mode of operation in response to the reset pattern.

19. An apparatus for data communication, comprising:

a serial interface having a clock line and a data line; and

a processor configured to:

configure the serial interface for a point-to-point mode of operation;

receive a first command through the serial interface, wherein the first command corresponds to an Improved Inter-Integrated Circuit (I3C) command in which a slave address is truncated to a single address bit, and wherein the first command includes a read/write bit;

participate in a first transaction conducted through the serial interface, wherein the first transaction is identified as a read or write transaction by the first command and is conducted in accordance with an I3C protocol; and

receive a second command when the serial interface is configured for the point-to-point mode of operation, by receiving only a first address bit of an I3C Common Command Code when the first address bit has a first value, receiving a plurality of additional address bits in the I3C Common Command Code when the first address bit has a second value, and participating in a private transaction when the first address bit has the first value, wherein a second read/write bit transmitted after the first address bit selects between a private read transaction and a private write transaction.

20. The apparatus of claim 19 , wherein the first transaction comprises one or more data frames formatted in accordance with the I3C protocol.

21. The apparatus of claim 19 , wherein the processor is further configured to:

transmit an acknowledgement in response to the first command.

22. The apparatus of claim 19 , wherein the processor is further configured to:

detect a START condition on the serial interface after the first transaction has been completed; and

drive the data line of the serial interface to request an in-band interrupt service procedure.

23. The apparatus of claim 22 , wherein the processor is further configured to:

obtain control of the serial interface after completion of the in-band interrupt service procedure.

24. The apparatus of claim 19 , wherein the processor is further configured to:

detect a reset pattern in a signal received from the serial interface; and

exit the point-to-point mode of operation in response to the reset pattern.