IP Library Granted Patent US 10,720,911
Granted Patent B2
US 10,720,911 · App. 16/521,715 · Granted Jul 21, 2020

Bootstrap circuit and a sampling circuit using the same

Inventors: Eun Seok Shin (Seoul, KR); Jung Ho Lee (Anyang-si, KR); Michael Choi (Seoul, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H03K17/063G11C27/024H02M3/073H02M2003/076H03K2217/0018
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Quick Facts
Patent No.
US 10,720,911
App. No.
16/521,715
Granted
Jul 21, 2020
Kind
B2
Abstract

A bootstrap circuit including: a charge pump; a power unit including a bootstrap capacitor, wherein the bootstrap capacitor is charged using an output voltage of the charge pump; and a switch driver for generating a bootstrap signal based on a clock signal and an analog signal, wherein the analog signal is input to an analog switch, the switch driver for controlling the analog switch using the bootstrap signal, and including a first body switch connected between an input terminal and a body of the analog switch.

Claims (42)

1. A bootstrap circuit, comprising:

a charge pump;

a power unit including a bootstrap capacitor, wherein the bootstrap capacitor is charged using an output voltage of the charge pump; and

a switch driver for generating a bootstrap signal based on a clock signal and an analog signal, wherein the analog signal is input to an analog switch, the switch driver for controlling the analog switch using the bootstrap signal, and including a first body switch connected between an input terminal and a body of the analog switch.

2. The bootstrap circuit of claim 1 , wherein the power unit includes:

a first transistor having a drain connected to a power voltage, and a source connected to a first node of the bootstrap capacitor; and

a second transistor having a drain connected to a second node of the bootstrap capacitor, and a source connected to a ground.

3. The bootstrap circuit of claim 1 , wherein the first body switch operates synchronously with the analog switch in response to the bootstrap signal.

4. The bootstrap circuit of claim 1 , wherein the switch driver further includes a second body switch connected between an input terminal and a body of the first body switch.

5. The bootstrap circuit of claim 1 , wherein the switch driver includes:

a first transistor having a source connected to a first node of the bootstrap capacitor and a drain connected to a control terminal of the analog switch; and

a second transistor having a source connected to a source of the analog switch and a drain connected to a second node of the bootstrap capacitor.

6. The bootstrap circuit of claim 5 , wherein a voltage, charged in the bootstrap capacitor, is supplied to the analog switch, when the first transistor and the second transistor are turned on.

7. The bootstrap circuit of claim 5 , wherein the switch driver further includes:

a third transistor connected between a power voltage and a gate of the first transistor; and

a fourth transistor and a fifth transistor, connected between the gate of the first transistor and the drain of the second transistor in parallel.

8. The bootstrap circuit of claim 7 , wherein the third transistor operates synchronously with the first transistor in response to the clock signal.

9. The bootstrap circuit of claim 7 , wherein the third transistor is operated alternately with the fourth and fifth transistors.

10. A bootstrap circuit, comprising:

a power unit including a bootstrap capacitor, wherein the power unit charges the bootstrap capacitor using an output voltage of a charge pump; and

a switch driver for supplying a voltage charged in the bootstrap capacitor to an analog switch in response to a clock signal and a channel selection signal, and including a first body switch connected between an input terminal and a body of the analog switch.

11. The bootstrap circuit of claim 10 , wherein the switch driver is connected to the bootstrap capacitor to drive the analog switch when the clock signal and the channel selection signal are both high logic values.

12. The bootstrap circuit of claim 10 , wherein the switch driver further includes: a second body switch connected between an input terminal and a body of the first body switch.

13. The bootstrap circuit of claim 10 , wherein the switch driver includes:

a first transistor having a source connected to a first node of the bootstrap capacitor and a drain connected to a control terminal of the analog switch; and

a second transistor having a source connected to a source of the analog switch and a drain connected to a second node of the bootstrap capacitor.

14. The bootstrap circuit of claim 13 , wherein the switch driver further includes:

third and fourth transistors connected to each other in parallel between a power voltage and a gate of the first transistor;

fifth and sixth transistors connected in series between the gate of the first transistor and the drain of the second transistor; and

seventh and eighth transistors connected to the fifth and sixth transistors in parallel.

15. The bootstrap circuit of claim 14 , wherein the first transistor is turned-off, when at least one of the clock signal and the channel selection signal has a low logic value.

16. The bootstrap circuit of claim 13 , wherein the switch driver further includes ninth, tenth and eleventh transistors connected between the control terminal of the analog switch and ground,

the tenth and eleventh transistors are connected to each other in parallel, and the ninth transistor is connected in series to the tenth and eleventh transistors.

17. The bootstrap circuit of claim 13 , wherein the switch driver further includes a twelfth transistor connected between the body of the analog switch and ground.

18. A sampling circuit, comprising:

a plurality of analog switches for sampling a plurality of analog signals; and

a bootstrap circuit connected to each of the plurality of analog switches,

wherein a first bootstrap circuit of the bootstrap circuits includes:

a power unit including a bootstrap capacitor, wherein the power unit charges the bootstrap capacitor using an output voltage of a charge pump; and

a switch driver for supplying a voltage charged in the bootstrap capacitor to a first analog switch of the analog switches in response to a clock signal and a channel selection signal, and including a first body switch connected between an input terminal and a body of the first analog switch.

19. The sampling circuit of claim 18 , wherein the switch driver further includes a second body switch connected between an input terminal and a body of the first body switch.

20. The sampling circuit of claim 18 , wherein the switch driver is connected to the bootstrap capacitor to drive the first analog switch, when the clock signal and the channel selection signal are both high logic values.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 25, 2019
From: SHIN, EUN SEOK; LEE, JUNG HO; CHOI, MICHAEL
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 049857/0645 →
Priority Claims (1)
KR 10-2018-0163110 · Dec 17, 2018 · national
Continuity (1)
Related Publication 20200195242A1 · Jun 18, 2020
Cited By (4)
US 12,294,381 US 12,525,972 US 12,549,190 US 12,658,905