Method of forming and packaging semiconductor die

1. A manufacturing and packaging method of a semiconductor die comprises:

preparing a wafer which has a seal-ring region;

forming a first interlayer insulating film on the wafer;

forming a metal wiring in the first interlayer insulating film;

forming a second interlayer insulating film on the first interlayer insulating film;

forming metal pads on the second interlayer insulating film;

forming a passivation layer on the metal pads;

removing a portion of the passivation layer in a region adjacent to the seal-ring region to expose the second interlayer insulating film;

etching a portion of the second interlayer insulating film in the region adjacent to the seal-ring region;

forming a bump directly on the metal pads;

removing the first interlayer insulating film and the second interlayer insulating film in the region adjacent to the seal-ring region by a laser grooving process; and

dicing the wafer into a first semiconductor die and a second semiconductor die.

2. The method of claim 1 further comprising:

preparing a flexible film which has input wire patterns and output wire patterns; and

attaching the bump to at least one of the input wire patterns and the output wire patterns with conductive balls.

3. The method of claim 1 , further comprising:

generating a silicon debris from the laser grooving process,

wherein the silicon debris is formed starting from a top surface of the second interlayer insulating film.

4. The method of claim 3 ,

wherein a height of the silicon debris is lowered by a thickness of the passivation layer.

5. The method of claim 1 ,

wherein the laser grooving process comprises a first laser grooving process and a second laser grooving process, and

wherein a pulse width of the second laser grooving process is greater than a pulse width of the first laser grooving process.

6. The method of claim 1 ,

wherein a dielectric constant of the first interlayer insulating film is below 3.0, and the dielectric constant of the first interlayer insulating film is lower than a dielectric constant of the second interlayer insulating film.

7. A manufacturing and packaging method of a semiconductor die comprising:

preparing a wafer which has a scribe line and a seal-ring-region;

forming an interlayer insulating film, a metal wiring, and metal pads on the wafer;

forming a passivation layer on the metal pads and the interlayer insulating film;

etching the passivation layer;

exposing a portion of the metal pads;

etching the interlayer insulating film in a region between the scribe line and the seal-ring region;

forming a bump on the metal pads after the etching of the interlayer insulating film;

performing a laser grooving process to generate a silicon debris on the etched interlayer insulating film adjacent to the sealing-region;

removing the interlayer insulating film in the scribe line by the laser grooving process; and

dicing the wafer to form the semiconductor die.

8. The method of claim 7 ,

wherein the interlayer insulating film comprises a first interlayer insulating film and a second interlayer insulating film,

wherein a dielectric constant value of the first interlayer insulating film is less than a dielectric constant value of the second interlayer insulating film,

wherein the metal wiring comprises a copper component,

wherein the metal pad comprises an aluminum component, and

wherein the passivation layer comprises a silicon nitride film.

9. The method of claim 7 ,

wherein a portion of the passivation layer is removed in a region adjacent to the seal-ring region, and a portion of the passivation layer is maintained in a region adjacent to the bump.

10. The method of claim 7 ,

wherein a bottom of the silicon debris is lowered by a thickness of the passivation layer.

11. A manufacturing and packaging method of a semiconductor die comprising:

forming a first interlayer insulating film on a substrate;

forming a second interlayer insulating film on the first interlayer insulating film;

forming metal pads on the second interlayer insulating film;

forming a passivation layer on the metal pads;

removing a portion of the passivation layer to expose the second interlayer insulating film;

forming a bump on the metal pads;

over-etching a portion of the second interlayer insulating film and a portion of the first interlayer insulating film by a laser grooving process; and

generating a silicon debris from the laser grooving process,

wherein the silicon debris is formed on an upper surface of the over-etched portion of the second interlayer insulating film, and

wherein a bottom surface of the silicon debris is positioned lower than a bottom surface of the passivation layer, and a top surface of the silicon debris is lower than a top surface of the bump.

12. The method of claim 11 , wherein a bottom surface of the silicon debris is positioned lower than a bottom surface of the bump.