Low density parity check encoder, and low density parity check encoding method using the same
A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword. The second memory is initialized to 0. The processor generates the LDPC codeword by performing accumulation with respect to the second memory using information bits. The accumulation is performed at parity bit addresses that are updated using a sequence corresponding to a parity check matrix (PCM).
1. A low density parity check (LDPC) decoder of a reception device receiving a broadcast signal, the LDPC decoder comprising:
a receiving unit configured to receive the broadcast signal corresponding to an LDPC codeword from a transmission device, the LDPC codeword generated by performing accumulation at parity bit addresses that are updated using a sequence corresponding to a parity check matrix (PCM); and
a decoding unit configured to perform decoding for the received signal, the decoding corresponding to the parity check matrix,
wherein the LDPC codeword comprises a systematic part corresponding to information bits, a first parity part corresponding to a dual diagonal matrix of the PCM, and a second parity part corresponding to an identity matrix of the PCM, and the first parity part and the second parity part include parity bits for correcting errors over a broadcast channel by which the broadcast signal is transmitted, and
wherein the parity bit addresses are updated in accordance with the following equation:
( x+m×Q 1 ) mod M 1 if x<M 1
M 1 +{( x−M 1 +m×Q 2 ) mod M 2 } if x≥M 1
where x denotes the previous parity bit addresses, m is an information bit index, L is a circulant permutation matrix (CPM) size of the PCM, Q 1 is M 1 /L, M 1 is a bit-size of the first parity part, Q 2 is M 2 /L, and M 2 is the size of the second parity part.
2. The LDPC decoder of claim 1 , wherein the parity bit addresses are updated based on results of comparing each of previous parity bit addresses specified in each row of the sequence with the size of the first parity part.
3. The LDPC decoder of claim 1 , wherein the accumulation is performed using memory having a size corresponding to a sum of the bit-size of the first parity part and the bit-size of the second parity part.
4. The LDPC decoder of claim 3 , wherein the accumulation is performed while the rows of the sequence are being repeatedly changed by the bit-size of the CPM of the PCM.
5. A low density parity check (LDPC) decoding method of receiving a broadcast signal, which is performed by a reception device, the method comprising:
receiving the broadcast signal corresponding to an LDPC codeword from a transmission device, the LDPC codeword generated by performing accumulation at parity bit addresses that are updated using a sequence corresponding to a parity check matrix (PCM); and
performing decoding for the received signal, the decoding corresponding to the parity check matrix,
wherein the LDPC codeword comprises a systematic part corresponding to information bits, a first parity part corresponding to a dual diagonal matrix of the PCM, and a second parity part corresponding to an identity matrix of the PCM, and the first parity part and the second parity part include parity bits for correcting errors over a broadcast channel by which the broadcast signal is transmitted, and
wherein the parity bit addresses are updated in accordance with the following equation:
( x+m×Q 1 ) mod M 1 if x<M 1
M 1 +{( x−M 1 +m×Q 2 ) mod M 2 } if x≥M 1
where x denotes the previous parity bit addresses, m is an information bit index, L is a circulant permutation matrix (CPM) size of the PCM, Q 1 is M 1 /L, M 1 is a bit-size of the first parity part, Q 2 is M 2 /L, and M 2 is the size of the second parity part.