Multilayer capacitor
A multilayer capacitor includes a body including a stacked structure of a plurality of dielectric layers and a plurality of internal electrodes, wherein, in the body, corners of cover portions are formed as curved surfaces, and 10 μm≤R≤T/4 in which R is a radius of curvature of the curved surface corners and T is a thickness of the body, and 0.8≤Tg/Wg≤1.2 in which Wg is a margin of the body in a width direction, and Tg is a margin of the body in a thickness direction.
1. A multilayer capacitor comprising:
a body including a stacked structure of a plurality of dielectric layers and a plurality of internal electrodes stacked with each of the plurality of dielectric layers interposed therebetween; and
external electrodes formed on external surfaces of the body and electrically connected to the plurality of internal electrodes,
wherein the body includes an active portion forming a capacitance by the plurality of internal electrodes disposed therein and cover portions disposed on upper and lower surfaces of the active portion, respectively, in a stacking direction of the plurality of dielectric layers,
the body has a first surface and a second surface, to which the plurality of internal electrodes are exposed, opposing each other, a third surface and a fourth surface which oppose each other in the stacking direction, and a fifth surface and a sixth surface which are connected to the first to fourth surfaces and oppose each other,
in the body, corners of the cover portions include curved surfaces, and 10 μm≤R≤T/4 in which R is a radius of curvature of the curved surfaces and T is a thickness of the body in the stacking direction, and
where a distance from a surface of the body to a closest internal electrode among the plurality of internal electrodes is defined as a margin, a margin (Wg) of each of the fifth surface and the sixth surface and a margin (Tg) of each of the third surface and the fourth surface satisfy a condition of 0.8≤Tg/Wg≤1.2.
2. The multilayer capacitor of claim 1 , wherein in the cover portions, corners at which the third surface is connected to the fifth surface and the sixth surface and corners at which the fourth surface is connected to the fifth surface and the sixth surface include curved surfaces.
3. The multilayer capacitor of claim 1 , wherein a margin (δ) of each of the corners formed as the curved surfaces in the cover portions is greater than or equal to a margin (Wg) of each of the fifth surface and the sixth surface.
4. The multilayer capacitor of claim 3 , wherein 1≤δ/Wg≤1.2.
5. The multilayer capacitor of claim 1 , wherein 0.5 μm≤Wg≤T/12.
6. The multilayer capacitor of claim 1 , wherein 0.5 μm≤Wg≤15 μm.
7. The multilayer capacitor of claim 1 , wherein 10 μm≤R≤60 μm in which R is the radius of curvature of the curved surfaces.
8. The multilayer capacitor of claim 1 , wherein the margin (δ) of each of the corners formed as the curved surfaces in the cover portions is the same as the radius (R) of curvature of the curved surfaces.
9. The multilayer capacitor of claim 1 , wherein the plurality of internal electrodes have a uniform width.
10. The multilayer capacitor of claim 1 , wherein in the body, where outer regions surrounding the plurality of internal electrodes are margin regions, a packing factor of a dielectric layer in the margin regions is lower than a packing factor of a dielectric layer in other regions of the body.
11. The multilayer capacitor of claim 10 , wherein in the margin regions, the plurality of dielectric layers include at least two layers having different packing factors, and a packing factor of a dielectric layer adjacent to the plurality of internal electrodes is higher than a packing factor of another dielectric layer of the at least two layers.
12. The multilayer capacitor of claim 10 , wherein the margin regions include a plurality of pores.
13. The multilayer capacitor of claim 12 , wherein the plurality of pores are needle-like pores.
14. The multilayer capacitor of claim 12 , wherein the plurality of pores have a form in which the plurality of pores are aligned in a shape corresponding to an outer shape of the body.
15. The multilayer capacitor of claim 14 , wherein the plurality of pores are composed of a plurality of rows, where each row is defined as a row of pores that are aligned in the shape corresponding to the outer shape of the body.
16. The multilayer capacitor of claim 15 , wherein pore densities of the plurality of rows are different from one another, and
a pore density of a region closer to an outer surface of the body is lower than pore densities of other regions in the plurality of rows.
17. A multilayer capacitor comprising:
a body including a stacked structure of a plurality of dielectric layers and a plurality of internal electrodes stacked with each of the plurality of dielectric layers interposed therebetween; and
external electrodes formed on external surfaces of the body and electrically connected to the plurality of internal electrodes,
wherein the body includes an active portion forming a capacitance by the plurality of internal electrodes disposed therein and cover portions disposed on upper and lower surfaces of the active portion, respectively, in a stacking direction of the plurality of dielectric layers,
the body has a first surface and a second surface, to which the plurality of internal electrodes are exposed, opposing each other, a third surface and a fourth surface which oppose each other in the stacking direction, and a fifth surface and a sixth surface which are connected to the first to fourth surfaces and oppose each other,
in the body, corners of the cover portions include curved surfaces,
where a distance from a surface of the body to a closest internal electrode among the plurality of internal electrodes is defined as a margin, a margin (Wg) of each of the fifth surface and the sixth surface and a margin (Tg) of each of the third surface and the fourth surface satisfy a condition of 0.8≤Tg/Wg≤1.2, and
a margin (δ) of each of the corners formed as the curved surfaces in the cover portions is greater than or equal to a margin (Wg) of each of the fifth surface and the sixth surface.
18. The multilayer capacitor of claim 17 , wherein 10 μm≤R≤T/4 in which R is a radius of curvature of the curved surfaces and T is a thickness of the body in the stacking direction.
19. The multilayer capacitor of claim 17 , wherein in the body, where outer regions surrounding the plurality of internal electrodes are margin regions, a packing factor of a dielectric layer in the margin regions is lower than a packing factor of a dielectric layer in other regions of the body.