IP Library Granted Patent US 10,971,992
Granted Patent B2
US 10,971,992 · App. 16/531,401 · Granted Apr 6, 2021

Start-up circuit to discharge EMI filter for power saving of power supplies

Inventors: Wei-Hsuan Huang (Taoyuan County, TW); Meng-Jen Tsai (Hsinchu, TW); Chien-Yuan Lin (Taipei, TW); Ming-Chang Tsou (Yilan County, TW); Chuan-Chang Li (Hsinchu, TW); Gwo-Hwa Wang (Taipei, TW)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H02M1/14H02M1/126H02M1/36H02M2001/322
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Quick Facts
Patent No.
US 10,971,992
App. No.
16/531,401
Granted
Apr 6, 2021
Kind
B2
Abstract

A start-up circuit to discharge EMI filter is developed for power saving. It includes a detection circuit detecting a power source for generating a sample signal. A sample circuit is coupled to the detection circuit for generating a reset signal in response to the sample signal. The reset signal is utilized for discharging a stored voltage of the EMI filter.

Claims (36)

1. A discharge circuit for discharging an EMI filter that has an X-capacitor comprising:

a monitor circuit configured for receiving a first signal from the EMI filter wherein the first signal is representative of a waveform of a power source;

the monitor circuit configured for charging a supply voltage from the first signal;

a first transistor of the monitor circuit configured for receiving the first signal; and

the monitor circuit configured for detecting that the power source is disconnected over a period of time and in response to the detecting and after the period of time enable the first transistor to provide a discharging path to conduct a discharge current from the EMI filter through the first transistor wherein the power source remains disconnected while the first transistor conducts the discharge current, the discharge current for discharging a stored voltage of the EMI filter wherein the discharging path is substantially cut off when the power source is in an active state.

2. The discharge circuit of claim 1 wherein the discharge circuit includes a second transistor coupled in series with the first transistor; and

the monitor circuit is configured to enable the second transistor in addition to the first transistors to provide the discharging path to conduct the discharge current through the second transistor wherein the second transistor is enabled responsively to detecting that the power source is disconnected over the period of time.

3. The discharge circuit of claim 1 wherein the monitor circuit includes a comparator for determining a value of the supply voltage relative to a threshold signal; and

the monitor circuit configured to enable the first transistor in response to an output of the comparator.

4. The discharge circuit of claim 1 wherein the monitor circuit includes a comparator for detecting that the first signal is greater than a reference value and wherein the monitor circuit is configured for detecting that the power source is disconnected in response to an output of the comparator.

5. The discharge circuit of claim 1 wherein the monitor circuit includes a detection and delay circuit for detecting that the first signal from the power source is greater than a reference signal.

6. The discharge circuit of claim 5 wherein the detection and delay circuit is configured to enable the first transistor to provide the discharging path and wherein the detection and delay circuit is reset when the first signal from the power source is less than the reference signal.

7. The monitor circuit of claim 1 further including a second transistor coupled in series to the first transistor;

a detection circuit for determining a value of the first signal relative to a reference signal for detecting that the power source is disconnected and to responsively provide a second signal.

8. The monitor circuit of claim 7 further including a delay circuit for receiving the second signal over a period of time and responsively providing a third signal wherein the second transistor is enabled in response to the third signal to provide the discharging path and to conduct the discharge current from the EMI filter through the first transistor and second transistor.

9. The monitor circuit of claim 7 wherein the detection circuit is configured to charge a supply voltage using the first signal; and

the detection circuit including a comparator for comparing the supply voltage to a threshold signal, wherein the first transistor is enabled in response to an output of the comparator.

10. A method of configuring a circuit for discharging an EMI filter having an X-capacitor comprising:

configuring a monitor circuit to monitor an AC power source;

configuring a detect circuit of the monitor circuit for detecting that the AC power source is disconnected;

configuring a delay circuit of the monitor circuit for receiving a signal from the detect circuit in response to detecting that the AC power source is disconnected for a period of time and to responsively provide a discharge signal after the period of time; and

configuring the monitor circuit to form a discharge path for discharging a stored energy of the EMI filter in response to the discharge signal, wherein the AC power source remains disconnected while discharging the stored energy, wherein the discharge path is substantially disabled in response to the monitor circuit subsequently detecting an active state of the AC power source.

11. The method of claim 10 including configuring a supply voltage to be charged using a signal from the AC power source; and

configuring the monitor circuit to compare the supply voltage to a threshold signal and responsively enable a first transistor.

12. A discharge circuit for a discharging an EMI filter having an X-capacitor comprising:

a first transistor and a second transistor coupled in series with each other and configured to receive a first signal from a power source that is filtered by the EMI filter; and

a monitor circuit configured to detect that the power source is not operating for a time interval and responsively form a discharge path to conduct a discharge current through both the first transistor and the second transistor to discharge a stored value of the EMI filter wherein the discharge current flows through the first transistor and from the first transistor to and through the second transistor.

13. The discharge circuit of claim 12 wherein the discharge path is substantially disabled in response to the power source operating.

14. The discharge circuit of claim 12 wherein the first transistor receives the first signal from the power source.

15. The discharge circuit of claim 12 wherein the monitor circuit includes a comparator to determine a value of the power source relative to a reference signal for detecting that the power source is not operating.

16. The discharge circuit of claim 12 further including a detect circuit for detecting that the power source is not operating and to responsively provide a second signal; and

a delay circuit for receiving the second signal over the time interval and responsively providing a discharge signal that enables the second transistor to provide the discharge path through the second transistor.

17. The discharge circuit of claim 16 wherein enabling the second transistor causes the first transistor to be enabled to form the discharge path through the first transistor.

18. The discharge circuit of claim 16 wherein a supply voltage is charged using the first signal.

19. The discharge circuit of claim 18 further including a comparator for comparing the supply voltage to a threshold signal and responsively enabling the first transistor.

20. The discharge circuit of claim 18 wherein the discharge path is enabled when the supply voltage is less than a threshold signal.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 051145, FRAME 0062 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064079/0474 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EXCLUSION OF FAIRCHILD SEMICONDUCTOR CORPORATION OF CONVEYING PARTY PREVIOUSLY RECORDED ON REEL 051145 FRAME 0062. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Dec 3, 2019
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 051170/0781 →
SECURITY INTEREST Recorded Nov 26, 2019
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 051145/0062 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 5, 2019
From: HUANG, WEI-HSUAN; LIN, CHIEN-YUAN; WANG, GWO-HWA
To: SYSTEM GENERAL CORP.
Reel/Frame 049957/0565 →
CHANGE OF NAME Recorded Aug 5, 2019
From: SYSTEM GENERAL CORP.
To: FAIRCHILD (TAIWAN) CORPORATION
Reel/Frame 049962/0942 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 5, 2019
From: FAIRCHILD (TAIWAN) CORPORATION (FORMERLY SYSTEM GENERAL CORPORATION)
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 049963/0001 →