IP Library › Granted Patent US 10,862,721
Granted Patent B2
US 10,862,721 · App. 16/531,877 · Granted Dec 8, 2020

Carrier recovery analog system for a receiver of a N-PSK signal

Inventors: Alexandre Siligaris (Grenoble, FR); Cedric Dehos (Douarnenez, FR); Jose-Luis Gonzalez Jimenez (Voreppe, FR); Clement Jany (Grenoble, FR); Baudouin Martineau (Grenoble, FR)
Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVE
H04L27/2276H03L7/081H03L7/099
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,862,721
App. No.
16/531,877
Granted
Dec 8, 2020
Kind
B2
Abstract

A carrier recovery system for a receiver of a phase-modulated signal N-PSK, the system including a first pre-conditioning circuit of the signal received (S(t)), with the pre-conditioned signal (SP(t)) having a component, non-modulated in phase, at the frequency Nƒ c where ƒ c is the carrier used for the modulation N-PSK, and a carrier regeneration circuit to regenerate two sinusoidal signals in quadrature at the frequency ƒ c , with these signals being phase locked with respect to said non-modulated component in phase of the pre-conditioned signal.

Claims (97)

1. A carrier recovery system for coherent receiver to receive a phase-modulated signal, S(t), by an N-PSK modulation of a carrier where N is an even number, the carrier recovery system comprising:

a signal pre-conditioning circuit for supplying a pre-conditioned signal having a non-modulated component with a harmonic Nƒ c of a carrier frequency ƒ c , said non-modulated component at Nƒ c being obtained by multiplication of the phase-modulated signal and of

K

=

N

2

-

1

delayed versions of the signal by respective delays

k

⁢

T

c

N

,

with k=1, . . . , K, each delay being defined to a nearest integer multiple of

T

c

2

,

where T c =1/ƒ c , with a result of said multiplication being subjected to a quadratic function; and

a carrier regeneration circuit for generating a sinusoidal signal at the carrier frequency phase locking onto said harmonic.

2. The carrier recovery system according to claim 1 , wherein the signal pre-conditioning circuit obtains the pre-conditioned signal by

SP

⁡

(

t

)

=

∏

k

=

0

N

2

-

1

⁢

⁢

S

⁡

(

t

+

kT

c

N

)

.

3. The carrier recovery system according to claim 2 , wherein the signal pre-conditioning circuit comprises a plurality K of stages, with each stage (k) comprising a delay ( 420 k ) of value

T

c

N

,

and a mixer ( 410 k ), with a mixer of a current stage (k) multiplying a signal supplied by a mixer ( 410 k−1 ) of a preceding stage (k−1) with a signal at an output of a delay ( 420 k−1 ) of the preceding stage, after having delayed it by the delay ( 420 k−1 ) of the current stage (k), with a first stage receiving said phase-modulated signal, with a signal at an output of a mixer of a last stage ( 410 K ) being rectified by a rectifier in order to supply the pre-conditioned signal (SP(t)).

4. The carrier recovery system according to claim 2 , wherein the signal pre-conditioning circuit comprises a plurality K of stages, with each stage (k) comprising a delay ( 520 k ) of value

T

c

N

+

T

c

2

,

and a mixer ( 510 k ), with a mixer of a current stage (k) multiplying a signal supplied by the mixer ( 510 k−1 ) of a preceding stage (k−1) with a signal at an output of a delay ( 520 k−1 ) from the preceding stage, after having delayed it by the delay ( 520 k ) of the current stage (k), with a first stage receiving said phase-modulated signal, with a signal at an output of a mixer of a last stage ( 510 K ) being supplied to a frequency doubling circuit, followed by a band-pass filter that only allows said harmonic Nƒ c to pass in order to supply the pre-conditioned signal, SP(t).

5. The carrier recovery system according to claim 2 , wherein each mixer of a current stage (k) comprises a first pair of transistors and a second pair of transistors, with gates of the transistors of the first pair and gates of transistors of the second pair receiving in differential an output signal of a mixer of a preceding stage (k−1), with drains of the transistors of the first pair and drains of the transistors of the second pair receiving in differential a signal at an output of a delay ( 520 k ) of the current stage (k), an output signal of the current stage being supplied in differential by a signal on a first common terminal of sources of the transistors of the first pair and a signal on a second common terminal of sources of the transistors of the second pair.

6. The carrier recovery system according to claim 2 , wherein each mixer of a current stage k=1, . . . ,K comprises a first oscillating circuit between a first common terminal and a mass and a second oscillating circuit between a second common terminal and a mass, with the first oscillating circuit and the second oscillating circuit allowing to pass only the harmonic at the frequency kƒ c.

7. The carrier recovery system according to claim 1 , wherein the carrier regeneration circuit is a frequency divider by a factor N.

8. The carrier recovery system according to claim 7 , further comprising an injection locked frequency divider followed by at least one frequency divider using a current switching logic CML and/or at least one frequency divider with a base of CMOS flip-flops, with a product of frequency division factors of the dividers being equal to N.

9. The carrier recovery system according to claim 1 , wherein the carrier regeneration circuit comprises an injection locked oscillator operating at the frequency Nƒ c , followed by a frequency divider by a factor N, an oscillator phase locking onto said non-modulated component at Nƒ c of the pre-conditioned signal and supplying a purely sinusoidal signal at the frequency Nƒ c , with the frequency divider dividing the frequency of the purely sinusoidal signal by a factor N in order to regenerate the carrier.

10. The carrier recovery system according to claim 1 , wherein the carrier regeneration circuit comprises an injection locked oscillator operating at a frequency

N

M

⁢

f

c

,

where M is an N-integer divider, followed by a frequency divider by a factor

N

M

,

with the injection locked oscillator locking in phase and in frequency on said non-modulated component at Nƒ c of the pre-conditioned signal and supplying a purely sinusoidal signal at the frequency

N

M

⁢

f

c

,

with the frequency divider dividing the frequency of the purely sinusoidal signal of a factor

N

M

in order to regenerate the carrier.

11. The carrier recovery system according to claim 10 , wherein the phase-modulated signal is a QPSK signal, with the injection locked oscillator being a differential cross-pair oscillator comprising a resonant circuit LC, of which a resonance frequency is close to 2ƒ c , with an injection of the pre-conditioned signal being carried out in common mode, the frequency divider divides a frequency of the differential signal at an output of the injection locked oscillator by a factor 2.

12. The carrier recovery system according to claim 1 , wherein the carrier regeneration circuit comprises an injection locked oscillator operating at the frequency ƒ c , with the oscillator locking in frequency and in phase on said non-modulated component at Nƒ c of the pre-conditioned signal and supplying a sinusoidal signal at the frequency ƒ c , in order to regenerate the carrier.

13. The carrier recovery system according to claim 12 , wherein the frequency regeneration circuit comprises two quadrature differential cross-pair oscillators, that use resonant circuits LC, of which a resonance frequency is close to ƒ c , with quadrature oscillators injection locking in common mode, an injection in common mode being carried out by the pre-conditioning circuit, comprising a transistor polarised in such a way that its point of polarisation belongs to a non-linear portion of its characteristic drain-source current according to its gate-source voltage, said transistor receiving on its gate, through a connecting capacitor, the phase-modulated signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 21, 2019
From: SILIGARIS, ALEXANDRE; DEHOS, CEDRIC; GONZALEZ JIMENEZ, JOSE-LUIS; JANY, CLEMENT; MARTINEAU, BAUDOUIN
To: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Reel/Frame 051072/0381 →
Priority Claims (1)
FR 18 57334 · Aug 6, 2018 · national
Continuity (1)
Related Publication 20200044900A1 · Feb 6, 2020
Cited By (1)
US 12,341,635